DV Intern

Etched.ai, Inc.; San Jose (CA); On-site; USD 27,552 - 41,328; Full time

Benefits offered by this job

Generous housing support

Daily lunch and dinner

Direct mentorship

Job summary

Etched.ai, Inc. is seeking a Design Verification intern to ensure high-performance custom IPs for chips. This 12-week paid internship based in San Jose, CA, offers mentorship from industry leaders and is an exciting opportunity to work on critical AI-driven projects.

The ideal candidate should be pursuing a degree related to engineering and have familiarity with digital logic, verification work, and potentially programming in Python. Generous housing support and meals are provided.

Qualifications

• Pursuing a degree in electrical engineering, computer engineering, or a related field.
• Familiarity with high-speed digital logic.
• Exposure to ASIC or SoC design concepts.

Responsibilities

• Ensure custom IPs powering chips are robust and silicon-ready.
• Collaborate with architects and designers to validate performance.

Skills

High-speed digital logic

SystemVerilog

Python

Verification work

ASIC design concepts

Education

Bachelor’s, Master’s, or PhD in electrical/computer engineering

Tools

UVM

Job description

About Etched

Etched is building the world’s first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.

Job Summary

As a Design Verification intern, you will ensure the custom IPs powering our chips — including systolic arrays, DMA engines, and NoCs — are robust, high-performance, and silicon-ready. This role demands creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.

You may be a good fit if you have

• Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
• Familiarity with high-speed digital logic
• Exposure to ASIC or SoC design concepts
• Familiarity with SystemVerilog, UVM, or Python
• Familiarity with verification work and writing test benches
• Familiarity with physical design flows and tooling
• Are able to learn quickly about transformers and other aspects of modern artificial intelligence

Strong candidates may also have experience with

• Familiarity with transformer models and machine learning
• UVM or formal verification experience"
• Ability to program with Python or another scripting language

Program details

• 12-week paid internship (June - August 2026)
• Generous housing support for those relocating
• Daily lunch and dinner in our office
• Based at our office in San Jose, CA
• Direct mentorship from industry leaders and world-class engineers
• Opportunity to work on one of the most important problems of our time