Distinguished Technologist - AI Model Performance Architect

Hewlett Packard Enterprise

Spring (TX)

On-site

USD 190,000 - 274,000

Full time

14 days+

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Benefits offered by this job

Health insurance
Dental insurance
Vision insurance
Life insurance
Generous time off policies

Job summary

Hewlett Packard Enterprise is seeking a Distinguished Technologist - AI Model Performance Architect located in Spring, Texas. This role involves optimizing AI workloads through system memory architecture and HW/SW co-design, ensuring efficiency and performance.

The ideal candidate will have a graduate degree in Electrical Engineering and extensive experience, focusing on model performance across various computational platforms. The position also provides a comprehensive benefits package including health insurance and generous time off policies.

Qualifications

  • Typically has 12+ years of work experience in electrical design and tools.
  • Demonstrated competence in architecture of electronic hardware.

Responsibilities

  • Analyze system bandwidth, latency, and compute bottlenecks.
  • Optimize model execution (initialization time, caching, KV reuse).
  • Drive HW/SW co-design (memory, caching, scheduling).

Skills

Memory & AI model design
Computer Science
Electrical Engineering
Debugging
MATLAB

Education

Four-year or Graduate Degree in Electrical Engineering or related discipline

Tools

Field-Programmable Gate Array (FPGA)
Schematic Capture
Oscilloscope

Job description

Distinguished Technologist - AI Model Performance ArchitectSkip to main contentWe use cookies (or similar technologies) to personalize content and ads, to provide social media features and to analyse our traffic. By clicking "Accept ", you agree to this and the sharing of information (What data we collect) about your use of our site with our affiliates & partners. Please find out more about Use of cookies.#Distinguished Technologist - AI Model Performance Architect page is loaded## Distinguished Technologist - AI Model Performance ArchitectApplylocations: Spring, Texas, United States of America: Palo Alto, California, United States of Americatime type: Full timeposted on: Posted Yesterdayjob requisition id: 3163838Distinguished Technologist - AI Model Performance Architect**Description -**This role is responsible for bridging system memory architecture with AI model behavior ensuring optimal performance through HW/SW co-design and workload aware tuning. This role develops AI workload optimization strategies for faster model startup, improved inferencing efficiency, and reduced memory needs. This role leverages technical and business expertise to outline strategy roadmaps for the function. The role identifies future growth opportunities and addresses gaps with innovative solutions. The role collaborates closely with various stakeholders, empowers teams to achieve remarkable and consequential outcomes, and spearheads industry-leading research and development. **Responsibilities*** Analyze system bandwidth, latency, and compute bottlenecks* Model performance across CPU/GPU/NPU for AI workloads* Simulate workload execution (PnP tradeoffs, resource contention)* Optimize model execution (initialization time, caching, KV reuse)* Drive HW/SW co-design (memory, caching, scheduling)* Partner with ML teams to align model structure with system architecture* Leverages recognized technical and business expertise to define long-term vision and strategy for electrical hardware design and development across multiple feature areas and divisional boundaries.* Develops technology roadmaps for electrical/hardware engineering team; identifies gaps and solutions for future growth.* Communicates strategy and technology roadmaps to executive staff, industry partners and customers.* Provides innovative solutions and integrates advanced technologies, theories, or techniques with a significant impact across disciplines, championing large projects for long-range goals.* Provides consultation, design input, and feedback for new product development and design reviews across multiple organizations and architectures.* Works closely with product management, engineering stakeholders from related departments and empowers the teams to deliver outstanding and impactful results.* Initiates industry-leading research and development, serving as a recognized lead authority internally and externally.* Provides mentoring and guidance to less-experienced staff members to set an example of electrical hardware design and development, innovation, and excellence.* Participates in and provides input on process for selection of future technical leaders.****Education & Experience** Recommended** • Four-year or Graduate Degree in Electrical Engineering, or any other related discipline or commensurate work experience or demonstrated competence. • Typically has 12+ years of work experience, preferably in electrical design and tools, software packages, architecture of electronic hardware, or a related field. **Knowledge & Skills** • Memory & AI model design• Computer Science • Debugging • Electrical Engineering • Electronic Engineering • Electronics • Field-Programmable Gate Array (FPGA) • Hardware Architecture • Hardware Design • MATLAB • Mechanical Engineering • New Product Development • Oscilloscope • Physics • Printed Circuit Board • Schematic Capture • Simulations • Systems Design **Cross-Org Skills** • Effective Communication • Results Orientation • Learning Agility • Digital Fluency • Customer Centricity **Impact & Scope** • Impacts multiple functions and influences long-term strategic direction across multiple disciplines or areas of HP. **Complexity** • Invents, develops and introduces new methods and techniques that impact multiple disciplines and work groups. **Disclaimer** This job description describes the general nature and level of work performed in this role. It is not intended to be an exhaustive list of all duties, skills, responsibilities, knowledge, etc. These may be subject to change and additional functions may be assigned as needed by management.The pay range for this role is 190,000.00 - 274,000.00 annually with additional opportunities for pay in the form of bonus and/or equity (applies to United States of America candidates only). Pay varies by work location, job-related knowledge, skills, and experience. **Benefits:** HP offers a comprehensive benefits package for this position, including:* Health insurance* Dental insurance* Vision insurance* Long term/short term disability insurance* Employee assistance program* Flexible spending account* Life insurance* Generous time off policies, including;* 4-12 weeks fully paid parental leave based on tenure* 11 paid holidays* Additional flexible paid vacation and sick leave (US benefits overview)The compensation and benefits information is accurate as of the date of this posting. The Company reserves the right to modify this information at any time, with or without notice, subject to applicable law.**Job -**Engineering**Schedule -**Full time**Shift -**No shift premium (United States of America)**Travel -****Relocation -****Equal Opportunity Employer (EEO) -**HP, Inc. provides equal employment opportunity to all employees and prospective employees, without regard to race, color, religion, sex, national origin, ancestry, citizenship, sexual orientation, age, disability, or status as a protected veteran, marital status, familial status, physical or mental disability, medical condition, pregnancy, genetic predisposition or carrier status, uniformed service status, political affiliation or any other characteristic protected by applicable national, federal, state, and local law(s).Please be assured that you will not be subject to any adverse treatment if you choose to disclose the information requested. This information is provided voluntarily. The information obtained will be kept in strict confidence.For more information, review HP’s EEO Policy or read about your rights as an applicant under the law here: “Know Your Rights: Workplace Discrimination is Illegal"
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