Director of ROIC Design

Safran Group; Camarillo, Northern (CA, KY); Hybrid; USD 180,000 - 260,000; Full time

Job summary

Safran Defense & Space, Inc. in the Ventura area seeks a Director of ROIC Design to lead Attollo's read-out integrated circuit team, guiding architecture, schedules, and budgets while maintaining hands-on engineering depth.

You will shape long-term ROIC technology roadmaps, collaborate with senior IC leadership, and ensure delivery of qualified silicon for SWIR/MWIR focal plane arrays and laser sensing products.

Qualifications

• Bachelor's degree in Electrical Engineering or related field; Master's preferred.
• 12+ years in analog and mixed-signal CMOS IC design with ROIC experience.
• Hands-on ROIC design ownership from tape-out to silicon bring-up.
• 3+ years direct people-management leading an IC design team.
• Deep knowledge of ROIC unit-cell architectures and detector-interface for infrared FPAs.
• Proficient in full custom analog/mixed-signal design flow: schematic, SPICE, layout, extraction, verification.
• Familiar with HDL (Verilog/SystemVerilog) and mixed-signal co-simulation.
• Proficiency in MATLAB/Python for modeling and characterization.
• Experience managing foundry engagements and tape-out logistics.
• Ability to obtain and maintain US DoD Secret Clearance.

Responsibilities

• Lead and develop the ROIC design team, including hiring and performance.
• Own ROIC design execution, schedules, budgets, and delivery from architecture through tape-out.
• Establish design reviews, verification standards, and tape-out readiness processes.
• Partner with senior IC leadership on ROIC technology strategy and roadmaps.
• Provide hands-on technical leadership in CMOS mixed-signal ROIC design and laser sensing applications.
• Drive signal-chain, noise, ADC, and high-bandwidth ROIC architecture decisions.
• Ensure designs meet performance, manufacturability, test, and environmental requirements including cryogenic/space.
• Collaborate with detector, packaging, test, process, and systems engineering teams.
• Support customer technical reviews, proposals, and new technology initiatives.
• Coordinate with Safran DSI and broader Safran tech organizations on shared practices.

Skills

ROIC design

People management

CMOS mixed-signal

Verilog/SystemVerilog

Schematic capture

SPICE simulation

Python, MATLAB

Budget & scheduling

Technical leadership

Education

Bachelor's degree in Electrical Engineering

Master's degree preferred

Tools

Verilog/SystemVerilog

SPICE

Schematic capture

Layout/physical verification

PDK/foundry engagements

Job description

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ABOUT OUR MISSION:

Join the forefront of innovation and make an impact at Safran Defense & Space, Inc.!

Safran Defense & Space Inc. (Safran DSI), headquartered in Arlington, Va., is a leading U.S. aerospace company dedicated to supporting national defense and space missions. As a trusted partner to the U.S. armed forces, government agencies, and commercial sectors, Safran DSI delivers advanced technology solutions through its specialized business units: Assured PNT, Attollo Engineering, Geospatial AI, Optronics, Space Solutions, and Testing & Telemetry.

Attollo Engineering is a designer and manufacturer of cutting-edge infrared cameras and laser sensor systems for defense and industrial applications. Leveraging extensive expertise in the electro-optical market, systems design, and packaging, Attollo delivers superior solutions for system integrators, original equipment manufacturers, and custom applications. Their commitment to quality engineering empowers Safran DSI to provide innovative and reliable technology to its partners.

POSITION PROFILE:

The Director of ROIC Design leads Attollo's read-out integrated circuit (ROIC) design organization. This is a working leadership role: the Director carries full management accountability for the ROIC design team — staffing, development, execution, schedule, and budget — while maintaining the technical depth required to review architectures, interrogate design decisions, and make defensible engineering trade calls. The Director works closely with the VP, IC Design to shape the long-term ROIC technology vision and roadmap, and converts that direction into delivered, qualified silicon supporting Attollo's SWIR and MWIR focal plane array, imaging core, and laser sensing product lines.

RESPONSIBILITIES:

• Lead and develop the ROIC design team, including hiring, performance, and technical growth.
• Own ROIC design execution, schedules, budgets, and delivery from architecture through tape-out and characterization.
• Establish design reviews, verification standards, and tape-out readiness processes.
• Partner with senior IC leadership on ROIC technology strategy, architecture, and multi-year roadmaps.
• Provide hands‑on technical leadership in CMOS mixed‑signal ROIC design and laser sensing applications.
• Drive signal‑chain, noise, ADC, and high‑bandwidth ROIC architecture decisions.
• Ensure designs meet performance, manufacturability, test, and environmental requirements, including cryogenic and space applications.
• Collaborate with detector, packaging, test, process, and systems engineering teams.
• Support customer technical reviews, proposals, business development, and new technology initiatives.
• Coordinate with Safran DSI and broader Safran technical organizations on shared technologies and design practices.
• Participate in special projects as assigned

SUPERVISORY RESPONSIBILITIES:

• Direct management of the ROIC design team.
• Carries out management responsibilities in accordance with company policy and applicable employment law, including hiring, training, planning and assigning work, performance management, recognition and disciplinary action, and resolution of employee‑relations issues in partnership with Human Resources.

WHAT YOU’LL NEED TO BE SUCCESSFUL:

• Bachelor's degree in Electrical Engineering or a closely related field required; Master's degree preferred.
• 12+ years of professional experience in analog and mixed‑signal CMOS integrated circuit design, with a minimum of 5 years focused on read‑out integrated circuits for imaging or sensing applications.
• Demonstrated ownership of ROIC designs through full tape‑out and successful silicon bring‑up, with at least one design in volume production or fielded application.
• 3+ years of direct people‑management experience leading an IC design team or demonstrated equivalent technical leadership with clear readiness to take on full management responsibility.
• Deep working knowledge of ROIC unit‑cell architectures, noise mechanisms, and detector‑interface considerations for infrared focal plane arrays.
• Proficiency with a full custom analog/mixed‑signal design flow, including schematic capture, SPICE‑class simulation, full‑custom layout, parasitic extraction, and physical verification
• Demonstrated proficiency in a full‑custom analog/mixed‑signal design environment.
• Familiarity with digital implementation flows and HDL (Verilog/System Verilog), including mixed‑signal co‑simulation.
• Proficiency with data analysis and scripting tools (MATLAB, Python, TCL, or equivalent) for modeling, automation, and characterization.
• Experience managing foundry engagements, including process selection, PDK use, and tape‑out logistics.
• Demonstrated ability to manage schedule and budget for multi‑year, milestone‑driven development programs.
• Strong written and verbal communication skills, including the ability to present technical content credibly to customers and senior leadership.
• Must be able to obtain and maintain a US DoD Secret Security Clearance

IDEALLY, YOU’LL ALSO HAVE:

• Active or reactivatable DOD Secret Security Clearance
• Direct experience with infrared focal plane arrays and hybridized detector/ROIC assemblies.
• Experience designing ROICs for laser sensing applications, including laser range finding, laser designation and spot tracking, LIDAR, or active imaging.
• Experience with digital‑pixel or in‑pixel ADC ROIC architectures.
• Experience designing for cryogenic operation, including device modeling and characterization at temperature.
• Experience with radiation‑hardened‑by‑design techniques for space applications (TID, SEL, SEU mitigation).
• Experience defining technology roadmaps and securing funding for internal research and development efforts.
• Experience working within an AS9100 or equivalent aerospace quality system.
• Experience working in an ITAR environment

TRAVEL:

Minimal travel may be required, including outside the local area and overnight.

Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions of the role.

Nearest Major Market: Ventura
Nearest Secondary Market: Oxnard