Director - Engineering, ASIC - Physical Design (Silicon One) AI Scale Chips

Cisco Systems, Inc

San Jose, Northern (CA, KY)

Hybrid

USD 251,000 - 363,000

Full time

14 days+

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Benefits offered by this job

401(k) match

Health insurance

Paid parental leave

Paid time off

Job summary

Cisco Systems, Inc. in San Jose seeks a senior hardware leader to guide SoC Physical Design, drive frontend/backend ASIC flows, and partner with RTL, NPI, Packaging, DFT, and Architecture to meet tight PPA goals.

You will own floorplan optimization, schedule execution, and design reviews while building a global, high-performing team to accelerate chip development.

Qualifications

Bachelor’s Degree in engineering or related technical field.
15+ years of experience in the hardware industry with proven management experience leading SoC and Physical Design teams.
Experience leading large ASIC developments in advanced process nodes.
Hands-on experience in ASIC design from concept to release.

Responsibilities

Strategic Execution: Develop and manage SoC execution schedules, tracking milestones and communicating status and risks to senior management.
PPA Optimization: Own optimization of floor-plans, area, and interconnects during early chip development to meet Power, Performance, and Area goals.
Technical Leadership: Drive SoC Physical Design implementation in advanced process nodes, leading a global team of engineers.
Cross-Functional Collaboration: Maintain interaction with RTL, NPI, Packaging, DFT, and Architecture to identify improvements and review design constraints.
Infrastructure Innovation: Build and oversee automation utilities to optimize chip area, quality, and execution speed.
Quality Assurance: Conduct design reviews with EMIR analysis and timing signoff closure to ensure high-quality work.
Team Growth: Build and scale a high-performing team of leaders as the organization grows.
Flow Mastery: Apply FE/BE ASIC flow expertise to drive methodology from concept to release.

Skills

Leadership

Project management

ASIC/SoC knowledge

Cross-functional collaboration

Education

Bachelor’s degree in engineering

Tools

PnR tools

Sign-off tools

STA timing analysis

Python/Tcl scripting

Job description

Meet the Team

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. With 2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's revolutionary solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.

Your Impact

Strategic Execution:Develop and manage SoC execution schedules, tracking critical milestones and communicating project status and risks to senior management.

PPA Optimization:Own the optimization of floor-plans, area, and interconnects during early chip development to meet stringent Power, Performance, and Area (PPA) goals.

Technical Leadership:Drive SoC Physical Design implementation in advanced process nodes, leading a world-class team of Physical Design, Circuit Design, DFT, and integration engineers.

Cross-Functional Collaboration:Maintain close interaction with global teams across RTL, NPI, Packaging, DFT, and Architecture to identify improvement opportunities and review design constraints.

Infrastructure Innovation:Build and oversee the development of automation utilities and infrastructure to optimize chip area, improve quality, and accelerate execution speed.

Quality Assurance:Conduct periodic design reviews with deep technical dives—including EMIR analysis and timing signoff closure to ensure high-quality work and schedule alignment.

Team Growth:Build and scale a high-performing team of passionate leaders as the organization grows.

Flow Mastery:Apply an expert understanding of both Front-End (FE) and Back-End (BE) ASIC flows to drive design methodology from concept to release.

Minimum Qualifications

Bachelor’s Degree in a technical field, preferably engineering and 15+ years of experience in the hardware industry with proven management experience leading SoC and Physical Design teams.

Demonstrable experience leading and managing large ASIC developments in advanced process nodes.

Prior experience in developing Physical Design execution schedules and tracking milestones.

Demonstrable hands‑on experience in ASIC design from concept to release.

Preferred Qualifications

Knowledge of industry-standard PnR and Sign-off tools and their capabilities.

Hands‑on experience in block‑level synthesis, place and route, timing closure, and advanced power/integrity analysis.

Proficiency in scripting languages such as Tcl and Python.

Expertise in managing Static Timing Analysis (STA), timing closure, and design constraints.

Self‑motivated with the ability to work effectively in a highly cross‑functional, global team environment.

Why Cisco?

At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Message to applicants applying to work in the U.S. and/or Canada:

The starting salary range posted for this position is $250,600.00 to $362,600.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits.

Individual pay is determined by the candidate’s hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long‑term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time.

10 paid holidays per full calendar year, plus 1 floating holiday for non‑exempt employees

1 paid day off for employee’s birthday, paid year‑end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco

Non‑exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full‑time employees

Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)

80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next

Additional paid time away may be requested to deal with critical or emergency issues for family members

Optional 10 paid days per full calendar year to volunteer

For non‑sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Employees on sales plans earn performance‑based incentive pay on top of their base salary, which is split between quota and non‑quota components, subject to the applicable Cisco plan. For quota‑based incentive pay, Cisco typically pays as follows: