Director, Advanced Power Silicon & Packaging Technology

NXP Semiconductors NV; Virginia; On-site; USD 200,000 - 320,000; Full time

Job summary

NXP Semiconductors NV seeks a Director of Advanced Power Silicon & Packaging Technology to shape the strategy and execution for next-generation power delivery across silicon, packaging, and system integration. You will partner with design, packaging, manufacturing, and product teams to push power efficiency, density, and reliability in AI, data center, and HPC platforms.

The role emphasizes leadership, IP creation, and collaborations with foundries, OSATs, EDA vendors, and research

Qualifications

• BS in Electrical Engineering, Physics, Materials Science, or related discipline.
• MS or PhD preferred.

Responsibilities

• Define and execute the long-term roadmap for advanced power silicon technologies, packaging, and chip-package-system co-design.
• Lead cross-functional teams across silicon design, packaging, architecture, manufacturing, and product organizations.
• Drive adoption of GaN, SiC, and advanced CMOS/BCD power processes to improve efficiency and density.
• Establish packaging roadmaps for 2.5D/3D, chiplet architectures, fan-out, and embedded power delivery.
• Lead PI, SI, thermal performance, reliability, and PDN optimization; manage IP portfolios and external partnerships.
• Mentor senior technical leaders and build organizational capability; drive patent generation and industry collaboration.

Skills

Strategic leadership

Technology roadmap

Power electronics

Silicon packaging

Cross-functional leadership

Mentoring

Patent portfolio

Standards involvement

Communication

Executive collaboration

Education

Bachelor's degree in Electrical Engineering, Physics, Materials Science, or related discipline

MS or PhD preferred

Job description

Position Summary

The Director of Advanced Power Silicon & Packaging Technology leads the strategy, architecture, development, and deployment of next-generation power delivery technologies spanning silicon, package, and system integration. This role is responsible for driving innovation in power semiconductors, advanced packaging, and silicon-package-system co-optimization for AI, datacenter, networking, and high-performance computing platforms.

The director partners across silicon design, packaging, architecture, manufacturing, and product organizations to deliver breakthrough improvements in power efficiency, power density, performance, reliability, and total cost of ownership.

Key Responsibilities

Technology Strategy & Vision

• Define and execute the long-term roadmap for:
• Advanced power silicon technologies
• Advanced packaging and heterogeneous integration
• Chip-package-system co-design
• Vertical power delivery solutions
• Identify disruptive technologies and assess strategic investment opportunities.
• Drive technology differentiation and competitive advantage.

Power Silicon Leadership

• Drive adoption of advanced semiconductor technologies including:
• GaN power devices
• SiC technologies
• Advanced CMOS and BCD power processes
• Optimize power efficiency, die area, and reliability.

Advanced Packaging Leadership

• Establish packaging technology roadmaps for:
• 2.5D and 3D packaging
• Chiplet architectures
• Silicon interposers
• Fan-out packaging
• Embedded power delivery
• Co-packaged solutions
• Lead package electrical, thermal, and mechanical optimization.
• Drive package innovations enabling higher power density and lower power delivery losses.

Silicon-Package-System Co-Design

• Lead cross-functional initiatives to optimize:
• Power integrity (PI)
• Signal integrity (SI)
• Thermal performance
• Electromigration reliability
• Power delivery network (PDN)
• Develop end-to-end power architectures from regulator to transistor.

Research & Innovation

• Lead advanced technology incubation and proof-of-concept programs.
• Build strategic partnerships with:
• Semiconductor foundries
• OSAT partners
• EDA vendors
• Universities and research institutions
• Create and manage intellectual property portfolios.
• Drive patent generation and technical publications.

Organizational Leadership

• Establish a culture of technical rigor, innovation, accountability, and execution excellence.
• Mentor senior technical leaders and develop organizational capability.

Required Qualifications

Education

• BS in Electrical Engineering, Physics, Materials Science, or related discipline.
• MS or PhD preferred.

Experience

• 15+ years of semiconductor and power technology experience.
• 6+ years leading technology, architecture, or engineering organizations.
• Proven success delivering innovative silicon and packaging technologies from concept through production.

Technical Expertise

Power Silicon

• Power semiconductor devices
• Power integrity analysis

Advanced Packaging

• Chiplet integration
• 2.5D/3D packaging
• Fan-out technologies
• Silicon interposers
• Package reliability and qualification

Systems Knowledge

• Power delivery networks
• Thermal management
• Manufacturing and supply chain considerations

Preferred Qualifications

• Expertise in:
• Vertical power delivery
• Backside power distribution networks
• Embedded voltage regulation
• Strong patent portfolio and industry recognition.
• Participation in IEEE, OCP, JEDEC, or semiconductor standards organizations.

More information about NXP in Greater China...