Digital Verification Engineer - Memory Controller & UVM

NXP Semiconductors; Austin (TX); On-site; USD 150,000 - 190,000; Full time

Job summary

NXP Semiconductors N.V. is seeking a verification engineer to advance architecture and RTL design for memory controllers and MRAM IP. The role involves developing verification environments, building testbenches, and delivering robust IP to the SoC team.

Responsibilities include creating test cases, debugging, assertions and coverage analysis, and maintaining project scripts. A Bachelor's degree and 5+ years in related roles are required, with Cadence and SystemVerilog/C++ proficiency preferred.

Qualifications

• Bachelor's degree required with 5+ years of progressive experience.
• 5 years of experience in verification roles such as Solutions Architect, Project Engineer, or similar.
• Experience with memory controllers and IP/verifications at SOC level is expected.

Responsibilities

• Develop verification plans and environments for IP, sub-system or IC level.
• Build and debug test cases, write assertions, and analyze functional coverage.
• Deliver validated memory IP hardware to the SoC team and support legacy testbenches.

Skills

SystemVerilog/C++

ARM/DSP architectures

Cache/flash memory controllers

SOC verification

Cadence

Gate-level simulations

IP verification

Education

Bachelor's degree in Electrical/Electronic/Computer Engineering

Tools

Cadence

Job description

NXP Semiconductors N.V. is seeking a verification engineer to advance architecture and RTL design for memory controllers and MRAM IP. The role involves developing verification environments, building testbenches, and delivering robust IP to the SoC team.

Responsibilities include creating test cases, debugging, assertions and coverage analysis, and maintaining project scripts. A Bachelor's degree and 5+ years in related roles are required, with Cadence and SystemVerilog/C++ proficiency preferred.