Digital Implementation AE Architect

Cadence Design Systems, Inc.; San Jose (CA); On-site; USD 157,500 - 292,500; Full time

Benefits offered by this job

Paid vacation

401(k) plan with employer match

Employee stock purchase plan

Variety of medical, dental, and vision plan options

Job summary

A technology company is seeking an Architect to lead technical engagements within its North America Field Applications Team. The role requires over 15 years of experience in IC design and a deep understanding of digital design fundamentals, particularly at advanced nodes (3nm and below). Key responsibilities include collaborating with customers, guiding product enhancements, and representing the company at industry events. Competitive salary range in California is between $157,500 and $292,500, along with comprehensive benefits.

Qualifications

• 15+ years of experience in IC design implementation and sign‑off.
• Experience in managing large-scale technical programs.
• Deep expertise in advanced node implementation (3nm and below).

Responsibilities

• Lead technical engagements with customers and partners for best‑in‑class PPA.
• Drive benchmarks and flow optimizations for cutting-edge methodologies.
• Represent Cadence at industry forums and deliver keynote presentations.

Skills

IC design implementation

Technical leadership

Scripting (Tcl, Python, Perl)

Stakeholder communication

Education

BS/MS in Electrical Engineering, Computer Engineering, or related field

Tools

Genus

Innovus

Tempus

Voltus

Job description

Overview

The Architect will serve as a technical leader within Cadence’s North America Field Applications Team, driving strategic customer engagements and influencing next-generation EDA & Agentic-AI solutions. This role demands exceptional technical depth, hands‑on experience of design convergence, and the ability to align cross‑functional teams toward delivering advanced design solutions for leading semiconductor companies.

Key Responsibilities

• Lead technical engagements with customers and partners to achieve best‑in‑class PPA, working closely with design teams to meet customer success metrics, guiding adoption of Cadence’s digital implementation, sign‑off technologies and AgenticAI features across advanced nodes (3nm and below).
• Partner with R&D and Product Engineering to influence tool enhancements based on real‑world customer requirements.
• Drive complex benchmarks, flow optimizations, and deployment of cutting‑edge methodologies for Synthesis, P&R, STA, IR Drop, and power/timing closure.
• Represent Cadence at industry forums, author technical papers, and deliver keynote presentations to position Cadence as a market leader.

Qualifications

• 15+ years of experience in IC design implementation and sign‑off, with demonstrated success in managing large‑scale technical programs.
• BS/MS in Electrical Engineering, Computer Engineering, or related field.
• Deep expertise in digital design fundamentals, advanced node implementation (3nm and below), and EDA tool ecosystems.
• Proven track record of leading technical teams and driving customer success at executive levels.
• Strong proficiency in scripting (Tcl, Python, Perl) and flow customization for design closure.
• Excellent communication, negotiation, and leadership skills with the ability to influence internal and external stakeholders.
• Prior experience with Cadence tools (Genus, Innovus, Tempus, Voltus, Conformal, Cerebrus) and competitive solutions highly desirable.

Compensation and Benefits

The annual salary range for California is $157,500 to $292,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits.

Benefits include paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

Equal Employment Opportunity Policy

Cadence is committed to equal employment opportunity throughout all levels of the organization and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.