Digital IC Design Intern: Shape Next‑Gen Semiconductors

Texas Instruments; Santa Clara (CA); Vor Ort; USD 39.000 - 55.000; Vollzeit

Zusammenfassung

Texas Instruments is seeking a Digital IC Design Engineering Intern in Santa Clara to help architect and document analog, digital, and RF ICs. You will work with teams to define specs, analyze architecture trade-offs, and participate in design reviews, while contributing to IC layouts and test developments.

The role emphasizes collaboration, initiative, and timely delivery. Ideal candidates are pursuing EE/CE degrees with a minimum GPA of 3.0 and can ramp quickly on new systems and processes.

Qualifikationen

• Pursuing undergraduate or graduate degree in Electrical Engineering, Computer Engineering, or related field.
• GPA of 3.0/4.0 or higher.

Aufgaben

• Partner with business teams and system engineering to develop design specifications.
• Provide high-level analysis on chip architecture trade-offs to ensure spec compliance and performance at a competitive cost.
• Participate in design reviews and document designs and product specifications.
• Partner on IC layouts to ensure a high-performance standard.
• Characterize prototypes, develop test specifications and coordinate with test/product engineering to drive product releases.
• Drive behavioral models.

Kenntnisse

Strong communication

Stakeholder relationships

Team collaboration

Initiative

Time management

Ausbildung

Electrical Engineering / Computer Engineering degree

Jobbeschreibung

Texas Instruments is seeking a Digital IC Design Engineering Intern in Santa Clara to help architect and document analog, digital, and RF ICs. You will work with teams to define specs, analyze architecture trade-offs, and participate in design reviews, while contributing to IC layouts and test developments.

The role emphasizes collaboration, initiative, and timely delivery. Ideal candidates are pursuing EE/CE degrees with a minimum GPA of 3.0 and can ramp quickly on new systems and processes.