Digital IC Design Engineer (AI Consulting)

Aligned Labs; United States; Remote; USD 138,000 - 193,000; Part time

Job summary

Aligned Labs is expanding its team of expert consultants with 15 Digital IC Design Engineers for part-time, fully-remote work supporting frontier AI research. Projects start at $100–140 USD per hour, with higher rates for senior engineers and recognized experts.

Ideal candidates have experience in RTL design, digital VLSI, and production tape-outs, with fluent English and a relevant engineering degree. You'll design original chip problems, stress-test AI models, and evaluate AI-generated

Qualifications

• Fluent English reading and writing required.
• Bachelor’s or higher in Electrical Engineering, Computer Engineering, or closely related field.
• Production experience writing synthesizable Verilog or SystemVerilog.
• At least one production tape-out as a contributing designer.

Responsibilities

• Design original chip design problems from scratch.
• Stress-test leading AI models on research-level chip design problems.
• Assess whether AI-generated reasoning meets the standards of a trained digital design engineer.

Skills

RTL design

Digital IC design

Verilog/SystemVerilog

Tape-out experience

Fluent English

Education

Bachelor’s or higher in Electrical/Computer Engineering

Job description

We are looking to expand our team of expert consultants with 15 Digital IC Design Engineers for part‑time, fully‑remote work supporting frontier AI research. Projects start at $100–140 USD per hour, with higher rates for senior engineers and recognized experts.

This role includes designing original chip design problems from scratch, stress‑testing leading AI models on research‑level chip design problems, and assessing whether AI‑generated reasoning meets the standards of a trained digital design engineer.

About Aligned

At Aligned, we partner with the world’s leading AI labs to push the frontier of AI knowledge in fields like math, science, and engineering. Our platform matches subject‑matter experts (like you) with paid consulting work on frontier projects at these labs.

Who We’re Looking For

You are actively engaged in chip design work and have professional experience in digital IC design, including writing RTL, building microarchitectures, and taking chips through to tape‑out.

Ideal Backgrounds

• RTL designers at AI chip startups or fabless companies
• Faculty or researchers working on digital VLSI design at universities or research institutes
• Senior engineers who have led blocks or subsystems through multiple tape‑outs

Minimum Qualifications

• Fluent English reading and writing skills
• Bachelor’s or higher in Electrical Engineering, Computer Engineering, or a closely related field
• Production experience writing synthesizable Verilog or SystemVerilog
• At least one production tape‑out as a contributing designer