Digital Hardware Engineer, Senior

Anysilicon; San Diego (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

Qualcomm's Wireless R&D group seeks a Senior Digital Hardware Engineer to develop a Test Base Station for verifying QCT mobile chipset functionality, focusing on the 6GR physical layer. You will collaborate with cross-disciplinary teams of Systems, RF, SW, and Test engineers.

Responsibilities include documenting milestones, translating requirements into FPGA/ASIC designs, and presenting design reviews; qualifications include degrees plus 2 years experience in FPGA/ASIC.

Qualifications

• Bachelor's degree in Computer Science, Engineering, Information Systems, or related field with 2 years of relevant experience; OR a Master's degree with 1 year of experience; OR a PhD in a related field.
• 2 years of experience in FPGA or ASIC design from RTL/HDL through simulation, synthesis, and verification.
• Proficiency in VHDL, Verilog, or System Verilog and related CAD tools.
• Experience in HDL Design Verification (DV).
• Familiarity with high-speed interfaces such as PCIe, Ethernet, UCIE.
• Understanding of SOC interconnect standards like AXI/AHB/AMBA/Wishbone/JREG/Avalon.
• Hands-on experience in a Product Development environment.

Responsibilities

• Collaborate with project lead to develop and document product milestones and deliverables.
• Understand and apply the latest 3GPP and other specifications.
• Translate systems requirements into efficient digital implementations that meet performance specifications.
• Architect, implement, and verify FPGA/SOC designs.
• Present design reviews to cross-disciplinary teams.
• Support commercialization of new hardware and features.

Skills

FPGA design

ASIC design

RTL/HDL

VHDL

Verilog

SystemVerilog

HDL DV

PCIe interface

Ethernet interface

AXI/AHB/AMBA

Wishbone/JREG/Avalon

Product development

Education

Bachelor's degree or higher in related field

Tools

CAD tools

Job description

Qualcomm's Wireless R&D group is seeking a Senior Digital Hardware Engineer to develop a Test Base Station (TBS) for verifying QCT mobile chipset functionality, focusing on the upcoming 6GR physical layer. The role involves collaboration with cross-disciplinary teams and requires effective communication with Systems, RF, SW, and Test engineers.

Responsibilities:

• Collaborate with project lead to develop and document product milestones and deliverables.
• Understand and apply the latest 3GPP and other specifications.
• Translate systems requirements into efficient digital implementations that meet performance specifications.
• Architect, implement, and verify FPGA/SOC designs.
• Present design reviews to cross-disciplinary teams.
• Support commercialization of new hardware and features.

Qualifications:

• Bachelor's degree in Computer Science, Engineering, Information Systems, or related field with 2 years of relevant experience; OR a Master's degree with 1 year of experience; OR a PhD in a related field.

Skills:

• 2 years of experience in FPGA or ASIC design from RTL/HDL through simulation, synthesis, and verification.
• Proficiency in VHDL, Verilog, or System Verilog and related CAD tools.
• Experience in HDL Design Verification (DV).
• Familiarity with high-speed interfaces such as PCIe, Ethernet, UCIE.
• Understanding of SOC interconnect standards like AXI/AHB/AMBA/Wishbone/JREG/Avalon.
• Hands-on experience in a Product Development environment.