Digital Design Engineer

Athari; Lexington (VA); On-site; USD 120,000 - 180,000; Full time

Job summary

Athari is seeking an experienced FPGA engineer to design and verify SoC FPGA implementations, integrating programmable logic with on‑chip software processing in a strict onsite role. You will work with cross‑functional teams to deliver robust FPGA solutions.

Required are strong HDL skills (VHDL/Verilog/SystemVerilog), RTL verification, and lab testing with logic analyzers and oscilloscopes. Onsite work five days a week in Lexington, VA is expected.

Qualifications

• Bachelor’s degree or higher in a related field (EE/CE/CS/Math/Physics).
• Strong HDL knowledge: VHDL, Verilog, SystemVerilog.
• Experience designing/testing SoC FPGA with PL integration and software.
• RTL verification at unit and chip level.
• Lab benchtop FPGA testing with logic analyzers and scopes.
• High-speed I/O / SERDES design and testing.
• Signal processing on programmable logic.
• Strong written and verbal communication for cross‑functional teams.

Responsibilities

Skills

VHDL

Verilog

SystemVerilog

RTL verification

Lab testing FPGA

SERDES interfaces

Signal processing for FPGA

Communication skills

Python

Education

Bachelor’s / Master’s / PhD in Electrical Engineering / Computer Engineering / CS / Math / Physics

Tools

Xilinx RFSoC

Modelsim/Questa/CoCoTB

CI pipelines

PCIe testing

Job description

• Bachelor’s degree, Master’s degree, or PhD in Electrical Engineering, Computer Engineering, Computer Science, Mathematics, Physics, or related scientific/engineering field
  


• Strong knowledge of hardware description languages including VHDL, Verilog, and/or System Verilog
  


• Experience designing and testing programmable logic designs targeting System on Chip (SoC) FPGA architectures that required integration of the programmable logic with on‑chip software processing
  


• Experience with unit‑level and FPGA chip level verification of RTL
  


• Experience with laboratory benchtop testing of FPGA designs including the use of integrated logic analyzers (e.g. ChipScope) and/or laboratory equipment such as stand‑alone logic analyzers or digital oscilloscopes
  


• Experience designing, testing, and debugging high‑speed I/O interfaces and protocols utilizing an FPGA’s built‑in SERDES
  


• Experiencing developing, designing, and programmable logic for signal processing applications
  


• Strong verbal and written communications skills including collaborating with other on‑site and/or remote technical team members, preparing and sharing technical results with others, and documenting work to aid other team members and activities

Desired Skills:

• Experience developing and testing with Xilinx‑based RFSoC devices
  


• Experience using Modelsim/Questa/CocoTB toolchain for RTL simulation
  


• Familiarity with continuous integration (CI) pipelines for joint FPGA and embedded software development
  


• Familiarity with Ethernet, Infiniband, and/or PCIe protocols, testing, tools, and debugging
  


• Familiarity with RDMA and RoCE protocols
  


• Experience programming in Python

Work Location:

• Candidate should expect to be onsite 5 days/week due to the nature of the work. Candidates expected to be local at the start of the assignment.
  

Clearance:

• Interim clearance is sufficient for the start of this assignment, howeverACTIVE SECRET is HIGHLY preferred.