Design Verification Engineer (eInfochips Inc)

Arrow Components; California (MO); On-site; USD 112,200 - 176,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance

401(k) with matching contributions

Paid Time Off

Tuition Reimbursement

Growth Opportunities

Job summary

Arrow Components is seeking a Design Verification Engineer IV in California to architect and support the verification environment for ASIC SoC products. This role includes responsibilities such as developing test benches and managing the verification process end-to-end.

The ideal candidate will have at least 8 years of experience, strong expertise in SystemVerilog and UVM, along with a relevant degree. The position is fully on-site, offering competitive compensation and comprehensive benefits.

Qualifications

• Minimum 8 years of related experience with a 4-year degree or equivalent experience.
• In-depth knowledge and experience in ASIC verification.
• Problem-solving where prior solutions may not exist.

Responsibilities

• Architect the verification environment for ASIC SoC.
• Develop complex self-checking test benches.
• Implement and maintain integrated formal verification flow.

Skills

SystemVerilog

UVM

C/C++

Education

4-year degree in a relevant field

Job description

Position

Design Verification Engineer IV

Job Description

We are seeking an experienced Design Verification Engineer to architect and support the verification environment for ASIC SoC products. The role involves end-to-end verification planning, testbench development, and formal verification activities to support multi-million gate product tapeouts.

What You’ll Be Doing

• Strong SystemVerilog and UVM expertise
• AXI, NOC, Ethernet, PCIe, and UCIe switch verification
• CPU ARM/RISC‑V verification with C/C++ test firmware
• Regression and coverage closure

Responsibilities & Qualifications

• Architect the verification environment for ASIC SoC and provide support from verification plan definition through multi‑million gate tapeout and test design.
• Develop complex self‑checking test benches with constraint‑random stimulus generation.
• Architect SoC test firmware and create test plan documentation to cover ASIC features.
• Develop and debug SoC ASIC platform test firmware and specific tests in C/C++.
• Partner in methodology development: analyze and review functional and technical specification documents.
• Implement and maintain integrated end‑to‑end formal verification flow.
• Develop and modify scripts to automate the verification process.
• Develop verification environment elements: assumptions, assertions, and coverage properties aligned with the verification plan.
• Requires in‑depth knowledge and experience in ASIC verification.
• Problem‑solving where prior solutions may not exist.
• Work independently with minimal guidance and act as a resource for less experienced colleagues.
• Typical experience: minimum 8 years of related experience with a 4‑year degree, or 6 years with an advanced degree, or equivalent experience.

Compensation

$112,200.00 – $176,000.00 (annual salary range; actual compensation may vary based on location, experience, and education).

Benefits

• Medical, Dental, Vision Insurance
• 401(k) with matching contributions
• Short‑Term and Long‑Term Disability Insurance
• Health Savings Account (HSA) / Health Reimbursement Account (HRA) options
• Paid Time Off (including sick, holiday, vacation, etc.)
• Tuition Reimbursement
• Growth Opportunities

Work Arrangement

Fully on‑site at Arrow client office location. Must be able to travel to client locations as requested.

Location

San Jose, CA (Complete on‑site)

EEO Statement

Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)