Design Verification Engineer Intern (Summer 2027)

MIPS Holding Inc

Richardson (TX)

On-site

USD 28,000 - 55,000

Full time

4 days ago
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Job summary

GlobalFoundries is seeking a Design Verification Engineer Intern to join the CPU verification team in Plano, Texas. You will gain hands-on experience verifying processor components, focusing on core functionality, performance, and modeling, while learning advanced verification methodologies with experienced architects.

The internship offers mentorship, real project work, and opportunities to contribute to cutting-edge semiconductor verification efforts in a fast-paced environment.

Qualifications

  • Sophomore status and pursuing a Bachelor’s in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field; must have at least a 3.0 GPA and be in good academic standing.
  • Fluent in English (written & verbal).
  • Available to work at least 40 hours per week during the internship.
  • Coursework or project experience with SystemVerilog, UVM, or constrained-random verification.
  • Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.
  • Basic understanding of cache and coherency concepts.
  • Scripting experience in Python, Perl, or Shell.
  • Strong analytical, problem-solving, and technical communication skills.
  • Self-motivated and collaborative, with the ability to contribute to project goals.

Responsibilities

  • Perform functional verification of CPU cores and related subsystems.
  • Interpret microarchitectural specifications and contribute to verification strategies.
  • Develop and execute verification plans, including testbench creation and test case development.
  • Write directed and constrained-random test cases in SystemVerilog, C, and Assembly.
  • Use UVM-based environments for coverage-driven verification.
  • Analyze coverage reports and support closure of gaps.
  • Automate regression and verification flows using Python, Perl, or Shell.
  • Collaborate with engineers and architects to support design quality and performance.
  • Perform all activities safely and in compliance with EH&S requirements.

Skills

SystemVerilog
UVM
Constrained-random verification
Python
Perl
Shell
RISC-V
ARM
MIPS

Education

Bachelor's in Electronics Engineering, Electrical Engineering, Computer Engineering, or Computer Science

Job description

About GlobalFoundries

GlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power-efficient and high-performance solutions for high-growth markets. GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com.

Internship Program Overview

Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.

Summary of Role

MIPS - A GlobalFoundries company is seeking a Design Verification Engineer Intern to join the CPU verification team in Plano, Texas. The intern will gain hands‑on experience verifying processor components, with a focus on CPU core functionality, performance, and modeling, while learning advanced verification methodologies and collaborating with experienced architects and designers.

Essential Responsibilities
  • Perform functional verification of CPU cores and related subsystems.
  • Interpret microarchitectural specifications and contribute to effective verification strategies.
  • Develop and execute verification plans, including testbench creation and test case development.
  • Write directed and constrained-random test cases in SystemVerilog, C, and Assembly.
  • Use UVM-based environments for coverage-driven verification.
  • Analyze coverage reports and support closure of functional and code coverage gaps.
  • Automate regression and verification flows using Python, Perl, or Shell.
  • Collaborate with engineers and architects to support design quality and performance.
Other Responsibilities
  • Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.
Required Qualifications
  • Education – At least a sophomore at time of application and actively pursuing a Bachelor’s in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field through an accredited degree program during the time of internship. Must have at least an overall 3.0 GPA and be in good academic standing.
  • Language Fluency - English (Written & Verbal)
  • Ability to work at least 40 hours per week during the internship.
  • Coursework or project experience with SystemVerilog, UVM, or constrained-random verification.
  • Familiarity with CPU architectures such as RISC-V, ARM, or MIPS.
  • Basic understanding of cache and coherency concepts.
  • Scripting experience in Python, Perl, or Shell.
  • Strong analytical, problem-solving, and technical communication skills.
  • Self-motivated and collaborative, with the ability to contribute to project goals.
Preferred Qualifications
  • Prior related internship or co-op experience
  • Demonstrated prior leadership experience in the workplace, school projects, competitions, etc.
  • Strong interest in leveraging AI tools and emerging technologies to enhance productivity, streamline workflows, and support effective decision-making.
  • Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.
  • Strong written and verbal communication skills
  • Strong planning & organizational skills
  • Exposure to RISC-V architecture.
  • Knowledge of interconnect protocols such as AXI, ACE, or CHI.
  • Experience with FPGA prototyping or emulation platforms.
#InternshipProgramUS

Expected Salary Range $20.00 - $40.00 Expected Salary Range $0.00 - $0.00 The exact Salary will be determined based on qualifications, experience and location.

If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information.

Requests for accommodation will be considered on a case-by-case basis.

Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.

An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.

GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential.

All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law.

We shape what's essential At GlobalFoundries you will find a vibrant work environment where collaboration and innovation thrive.

Our diverse and global team shares a culture of respect and inclusivity, representing the best in the industry.

We celebrate success together and are united by our dedication to excellence and our desire to improve and empower the world.

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