Design Verification Engineer

Apple Inc.

Santa Clara, Northern (CA, KY)

On-site

USD 150,000 - 278,000

Full time

14 days+
Application generator

Don’t send a generic resume — generate a resume and cover letter tailored to this exact role.

Get past ATS filters

Job summary

Apple Inc. is seeking a Design Verification Engineer in Santa Clara, CA to verify the functionality and performance of Apple’s premier SOCs.

You will own test plans, coverage, and testbenches, collaborating with design, micro-architecture, and software teams to ensure high quality designs. Minimum qualifications include a BS with 3+ years of experience and strong SystemVerilog/UVM expertise, plus Python/C/C++ and scripting skills.

Qualifications

  • Minimum of BS + 3 years relevant industry experience.
  • Strong knowledge of SystemVerilog and digital verification methodologies.
  • Experience with constrained random verification, functional/Code coverage, and UVM.
  • Proficiency in debugging, architecture review, and testbenches.
  • SW programming skills with knowledge of data structures and algorithms.
  • Experience with Python, Perl or similar scripting languages.
  • Ability to work independently to deliver project goals.
  • Excellent interpersonal skills and collaboration across teams.

Responsibilities

  • Verify functionality and performance of Apple SOCs.
  • Develop test plans, tests and coverage plans and testbenches.
  • Review design/architecture specs and collaborate with design, micro-architecture and software teams.
  • Define verification methodology and create use-case driven tests and corner cases.
  • Communicate and coordinate with multiple teams to ensure quality and coverage.

Skills

Digital verification concepts
SystemVerilog
Python
C/C++
UVM
Computer architecture
Debugging
Constrained random verification
Code coverage
Functional coverage

Education

BS degree in a related field

Tools

Verilog/SystemVerilog tools
Python scripting
Perl scripting

Job description

Santa Clara, California, United States Hardware

Does making the next great technology product excite you? Imagine what you could do here. At Apple, our new ideas have a way of becoming great products, services, and customer experiences very quickly. We bring passion and dedication to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us.

Description

As part of a very dedicated team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model). You own ensuring the quality of the SOC or an IP or subsystem. This requires you to review design and architecture specifications and work closely with design & micro-architecture teams. A key component to the job is understanding the functional & performance goals of the design and you use this knowledge to test optimally. You develop test plans, tests & coverage plans as well as define our next generation verification methodology & testbenches. You will actively communicate and collaborate with design, architecture and software to understand the use cases and corner conditions and drive test cases.The SOC contains many subsystems and IP, so you may be working on one or several of the following types of IP:- Neural Engine hardware- DRAM subsystem, memory controller logic- Encode and Decode systems for ProRes and other codec formats such as VP9, AV1- Hardware security, including cryptographic algorithm implementations- High-Speed IO standards such as PCI Express, DisplayPort, MIPI- Power management and fabric infrastructure- Memory cache management- Display Subsystem for variety of panels and products.These are just some examples of the exciting designs that are part of our team. Joining SOC DV allows you to focus deeply on one main IP or expand your breadth as you work on a collection of subsystems. It’s up to you!

Minimum Qualifications
  • Minimum of BS + 3 years relevant industry experience.
Preferred Qualifications
  • Skilled in many aspects of digital verification such as constrained random verification process, functional coverage, code coverage, assertion methodology & philosophy
  • Knowledge of SystemVerilog, digital simulation and debug
  • Knowledge of computer architecture and digital design fundamentals
  • SW programming skills with knowledge of data structures and algorithms
  • Experience with Python, Perl, or similar scripting language
  • Ability to work independently to deliver the project goals
  • Knowledge of verification methodologies like UVM
  • Experience with C/C++, assembly is a plus
  • Excellent interpersonal skills and the dream to tackle diverse challenges.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including:

  • Comprehensive medical and dental coverage
  • Retirement benefits
  • A range of discounted products and free services
  • Reimbursement for certain educational expenses — including tuition
  • Discretionary bonuses or commission payments as well as relocation

Learn more about Apple Benefits

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

At Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.

Learn about accessibility in Apple’s workplace

Learn about reasonable accommodations for job applicants

Apple accepts applications to this posting on an ongoing basis.

Get your free, confidential resume review.
or drag and drop your file here.
Similar jobs

Similar jobs worth comparing

Design Verification Engineer
Design Verification Engineer

Apple Inc. • Sunnyvale (CA)

On-site
USD 150,000 - 278,000
Medical and dental coverage
Stock plan eligibility
Relocation assistance
+1
Design Verification Engineer
Design Verification Engineer

Socket.dev • Waltham (MA)

On-site
USD 149,700 - 249,500
Design Verification Engineer
Design Verification Engineer

Apple Inc. • San Diego (CA)

On-site
USD 175,000 - 309,000
Employee stock programs
Relocation assistance
Bonuses/Commission
+1
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Seattle (WA)

On-site
USD 175,000 - 308,500
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Town of Texas (WI)

On-site
USD 120,000 - 170,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 126,800 - 190,900
Comprehensive medical and dental coverage
Retirement benefits
Discounted products and services
+1
Design Verification Engineer: SOC & IP Specialist
Design Verification Engineer: SOC & IP Specialist

Apple Inc. • Austin (TX)

On-site
USD 120,000 - 170,000
SoC Full Chip DV Engineer
SoC Full Chip DV Engineer

Apple Inc. • Cupertino (CA)

On-site
USD 120,000 - 180,000
Design Verification Engineer
Design Verification Engineer

Apple Inc. • San Francisco (CA)

On-site
USD 129,000 - 226,000
CPU Top-Level Design Verification Engineer
CPU Top-Level Design Verification Engineer

Apple Inc. • Santa Clara (CA)

On-site
USD 129,000 - 195,000
Stock programs
Relocation assistance
Medical & dental coverage