Design Verification Engineer

Texas Instruments Incorporated; Knoxville (TN); On-site; USD 110,000 - 170,000; Full time

Job summary

Texas Instruments Incorporated in Knoxville is seeking a Design Verification Engineer to join the Analog Power Products organization. You will develop and execute verification strategies to ensure first-pass silicon success for next-generation analog and mixed-signal ICs across industrial, automotive, and consumer applications.

The role spans the full verification cycle, from creating verification plans and building test benches to running coverage regressions and tracking closure, in

Qualifications

• Experience in verification methodologies for analog/mixed-signal ICs.
• Ability to develop verification plans with design/systems teams.
• Familiarity with RTL-level and GLS verification approaches.

Responsibilities

• Develop detailed verification plans while working closely with the design and system team to ensure first-pass silicon success
• Develop test benches, tests, and simulations at RTL and gate-level (GLS)
• Run coverage regressions to meet defined coverage goals
• Track and communicate verification status, issues, and concerns
• Work with regression tools and develop scripts to submit cases for regression analysis
• Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods, and flows

Skills

Test benches

RTL

SystemVerilog

DV methodology

Tools

UVM

Verilog

Simulation tools

Job description

Change the world. Love your job.

Texas Instruments is seeking a Design Verification Engineer to join our Analog Power Products organization in Knoxville. In this role, you will develop and execute verification strategies that ensure first-pass silicon success for next-generation analog and mixed-signal ICs across industrial, automotive, and consumer applications.

As a Design Verification Engineer, you will work across the full verification cycle – from developing detailed verification plans and building test benches through running coverage regressions, tracking closure, and contributing to continuous improvements in DV methodology – collaborating closely with digital design and systems engineering teams.

Responsibilities include:

• Develop detailed verification plans while working closely with the design and system team to ensure first-pass silicon success
• Develop test benches, tests, and simulations at RTL and gate-level (GLS)
• Run coverage regressions to meet defined coverage goals
• Track and communicate verification status, issues, and concerns
• Work with regression tools and develop scripts to submit cases for regression analysis
• Contribute to continuous improvements for quality and efficiency on DV strategy, tools, methods, and flows