Design Verification Engineer

Intelliswift - An LTTS Company; Austin (TX); On-site; USD 220,000 - 240,000; Full time

Job summary

An established industry player is seeking a talented Assistant Manager for Technical Recruitment to join their dynamic team. This full-time role focuses on enhancing design verification processes for cutting-edge technology projects, ensuring the highest quality standards are met. You will be at the forefront of developing innovative verification methodologies and collaborating with cross-functional teams to drive continuous improvements. If you're passionate about technology and eager to make a significant impact in a thriving environment, this opportunity is perfect for you.

Benefits

Medical insurance

401(k)

Vision insurance

Qualifications

• 7+ years of experience in SystemVerilog/UVM and C/C++ verification.
• Experience in architecting Design Verification infrastructure.
• Track record of first-pass success in ASIC development.

Responsibilities

• Define and implement IP/SoC verification plans.
• Drive Design Verification to closure based on defined metrics.
• Collaborate with cross-functional teams to ensure design quality.

Skills

SystemVerilog/UVM methodology

C/C++ based verification

Debugging and root-cause analysis

EDA tools and scripting (Python, TCL, Perl, Shell)

Design Verification infrastructure

Education

Bachelor's degree in Computer Science

Equivalent practical experience

Tools

EDA tools

Revision control systems (Mercurial, Git, SVN)

Job description

2 weeks ago Be among the first 25 applicants

Intelliswift - An LTTS Company provided pay range

This range is provided by Intelliswift - An LTTS Company. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.

Base pay range

$220,000.00/yr - $240,000.00/yr

Direct message the job poster from Intelliswift - An LTTS Company

Assistant Manager - Technical Recruitment | Strategic Sourcing, Technical Recruiting

Full time role.

Sunnyvale, California or Austin, Texas

Note: No hybrid or remote

Job Description & Skill Requirement

Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification.

Develop functional tests based on verification test plan.

Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.

Debug, root-cause and resolve functional failures in the design, partnering with the Design team.

Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality.

Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.

Minimum Qualifications

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

7+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification.

Track record of 'first-pass success' in ASIC development cycles.

7+ years of experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies.

Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.

Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.

Preferred Qualifications

Experience in development of UVM based verification environments from scratch.

Experience verifying GPU/CPU designs.

Experience with micro-architectural performance verification.

Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs.

Experience with verification of ARM/RISC-V based sub-systems or SoCs.

Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet.

Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.

Experience working across and building relationships with cross-functional design, model and emulation teams.

Experience with revision control systems like Mercurial(Hg), Git or SVN.

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Full-time

Job function

• Industries

  Information Technology & Services, Semiconductor Manufacturing, and Computers and Electronics Manufacturing

Referrals increase your chances of interviewing at Intelliswift - An LTTS Company by 2x

Inferred from the description for this job

Medical insurance

401(k)

Vision insurance

Get notified when a new job is posted.

Sign in to set job alerts for “Design Verification Engineer” roles.

Austin, TX $114,000.00-$133,000.00 2 weeks ago

Austin, TX $114,000.00-$166,000.00 2 weeks ago

Austin, TX $114,000.00-$166,000.00 2 weeks ago

Austin, TX $142,000.00-$203,000.00 2 weeks ago

Austin, TX $129,800.00-$212,800.00 2 days ago

Austin, TX $127,000.00-$187,000.00 4 days ago

CPU Functional Verification Engineer, Silicon, University Graduate

Austin, TX $108,000.00-$158,000.00 4 days ago

Austin, TX $114,000.00-$166,000.00 2 weeks ago

Austin, TX $212,000.00-$291,000.00 2 weeks ago

Austin, TX $142,000.00-$203,000.00 2 weeks ago

Austin, Texas Metropolitan Area 6 hours ago

Austin, Texas Metropolitan Area 1 day ago

Austin, TX $142,000.00-$203,000.00 2 weeks ago

Austin, Texas Metropolitan Area 6 days ago

Fall Co-Op - Digital Design Engineer (FF)

Austin, TX $104,000.00-$212,200.00 2 weeks ago

Austin, TX $173,000.00-$249,000.00 2 weeks ago

Austin, TX $212,000.00-$291,000.00 2 weeks ago

SOC Design Verification Engineer, Self-Driving

ASIC Physical Design Engineer, Annapurna Labs

Austin, TX $130,355.00-$221,603.00 1 week ago

CPU Verification Engineer (Multiple Locations)

Austin, TX $139,000.00-$234,500.00 4 days ago

Austin, Texas Metropolitan Area $90.00-$100.00 5 days ago

Austin, Texas Metropolitan Area 1 month ago

Austin, TX $140,000.00-$229,800.00 2 weeks ago

We’re unlocking community knowledge in a new way. Experts add insights directly into each article, started with the help of AI.