Design Methodology and Automation Engineer

Socket.dev; San Jose (CA); On-site; USD 133,000 - 158,000; Full time

Job summary

Altera is seeking a Design Automation Engineer to join the Design Infrastructure and Automation Team in San Jose, CA. You will build and maintain core automation infrastructure for RTL to bitstream, delivering scalable, reliable design flows and accelerating development cycles for FPGA products.

You will collaborate with RTL designers, physical design, and verification teams, applying AI to boost productivity, while evaluating new EDA vendors and integrating CI/CD and cloud-based orchestration

Qualifications

• 4+ years of experience with EDA tools and FPGA/ASIC design flows (e.g., lint, cdc).
• 4+ years of experience in Unix/Linux environments and scripting/programming languages such as Python, Perl, and Shell.

Responsibilities

• Develop and maintain in-house tools and infrastructure for end-to-end design flow automation.
• Apply and develop AI solutions that enhance productivity and efficiency for chip design.
• Collaborate cross-functionally with RTL designers, physical design engineers, verification teams, and tool vendors to deliver scalable solutions.
• Evaluate and implement new EDA vendor technologies and frameworks to enhance design development process.
• Drive process improvements, standardization, and reusable components across automation infrastructure.

Skills

Python

Shell scripting

Unix/Linux

Git

Cross-functional collaboration

Education

Bachelor's or Master's degree in CS / EE / related field

Tools

EDA tools

CI/CD

Cloud-based orchestration

Job description

Job Details:

Job Description:

About Altera

At Altera™, our independence as the world's largest pure-play FPGA solutions provider gives us the focus, speed, and agility to innovate without compromise. With more than four decades of industry-leading FPGA expertise, our singular mission is to deliver the programmable technologies that help customers differentiate, innovate, and scale across rapidly evolving markets like AI, cloud, networking, and edge. As an independent company, we move faster, invest deeper, and partner more closely - empowering our teams to drive breakthrough innovation and shape the future of the FPGA industry.

About the Role

Altera is seeking a Design Automation Engineer to join our Design Infrastructure and Automation Team.

This team is responsible for building and maintaining the core automation infrastructure that supports Altera's FPGA design flows - from RTL to bitstream. In this role, you will play a critical part in scaling our internal design productivity, delivering highly automated, reliable, and efficient flow systems that accelerate development cycles for next-generation FPGA products.

Key Responsibilities:

• Develop and maintain in-house tools and infrastructure for end-to-end design flow automation.

• Apply and develop AI solutions that enhance productivity and efficiency for chip design.

• Collaborate cross-functionally with RTL designers, physical design engineers, verification teams, and tool vendors to understand requirements and deliver scalable solutions.

• Evaluate and implement new EDA vendor technologies and frameworks to enhance design development process

• Drive process improvements, standardization, and reusable components across automation infrastructure.

Salary Range

The pay range below is for Bay Area California only. Actual salary may vary based ona number offactors including job location, job-related knowledge, skills, experiences,trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.

$133,200- $158,000 USD

We use artificial intelligence to screen, assess, or select applicants for the position.Applicants must be eligible for any required U.S. export authorizations.

Qualifications:

Minimum Qualifications:

Bachelor's or Master's Degree in Computer Science, Electrical Engineering, or related field with 4+ years of relevant industry experience, including:

• 4+ years of experience with EDA tools and FPGA/ASIC design flows (e.g., lint, cdc, etc).

• 4+ years of experience in Unix/Linux environments and scripting/programming languages such as Python, Perl, and Shell.

• 4+ years of experience building and testing flow automation tools and integrating them into complex design pipelines.

• 4+ years of experience in debugging, testing, and version control (e.g., Git).

• Ability to collaborate with cross-functional teams and translate user requirements into scalable solutions.

Preferred Qualifications:

• 6+ years of relevant industry experience with Design Automation tools

• Experience with AI tools.

• Knowledge of CI/CD systems and automated testing frameworks.

• Exposure to cloud-based job orchestration frameworks or hybrid compute environments.

• Strong communication and problem-solving skills with a drive for continuous improvement.

Job Type:

Regular

Shift:

Shift 1 (United States of America)

Primary Location:

San Jose, California, United States

Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance.