CPU SoC Verification Engineer

Google; United States; On-site; USD 138,000 - 197,000; Full time

Job summary

Google is seeking a CPU SoC DV Engineer to ensure functional integrity from RTL simulation to silicon characterization. You will build verification environments, drive GLS, and collaborate with ATE teams to debug and stabilize high-speed patterns in production.

You will translate sequences for ATE readiness, perform GLS-driven simulations and contribute to cutting-edge silicon solutions powering Google's consumer products.

Qualifications

• Bachelors in EE/CE/CS or equivalent practical experience.
• 4+ years in ARM-based SoC verification, covering cache coherency, NoC interconnects, or high-speed bus protocols.
• Experience with RTL verification and GLS workflows.

Responsibilities

• Drive ARM SoC and sub-system level verification, simulation, and debug for CPU RTL and gate-level netlists.
• Lead post-silicon debug to diagnose complex hardware failures and ensure production pattern stability.
• Translate simulation sequences into ATE/SLT-ready formats for high-fidelity pattern conversion.
• Execute GLS and timing-annotated simulations using industry-standard EDA tools.
• Generate and convert ATE patterns via virtual tester environments for fidelity.

Skills

RTL verification

Post-silicon debug

GLS workflows

EDA tools experience

Education

Bachelor's degree in EE/CE/CS

Master's degree in EE/CE/CS (preferred)

PhD in EE/CS (preferred)

Tools

UVM/OVM

Python/Perl scripting

ARM verification tools

Job description

CPU SoC Verification Engineer

Company: Google

Note: By applying to this position you will have an opportunity to share your preferred working location from the following: San Diego, CA, USA; Mountain View, CA, USA.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 4 years of experience with ARM-based SoC verification, including cache coherency, Network-on-Chip (NoC) interconnects, or high-speed bus protocols.
• Experience with post-silicon debug and diagnosing failures across Process, Voltage, and Temperature (PVT) corners.
• Experience in RTL verification and Gate Level Simulation (GLS) workflows.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience with UVM/OVM methodologies and using Python or Perl to automate ARM SoC verification flows.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a CPU SoC DV Engineer, you will be responsible for ensuring the functional integrity of CPU subsystems from initial RTL simulation through to final silicon characterization. You will develop robust verification environments, drive GLS, and partner with ATE teams to debug and stabilize high-speed patterns in a production environment.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Individual pay is determined by factors including job-related skills, experience, and relevant education or training.
US: $138000 - $197000 (USD) + 15% bonus target + equity + benefits
Learn more about benefits at Google.

Responsibilities

• Drive ARM SoC and sub-system level verification, simulation, and debug for CPU RTL and gate-level netlists.
• Lead post-silicon debug efforts to diagnose complex hardware failures and ensure pattern stability in production.
• Translate simulation-based functional sequences into ATE/SLT-ready formats, ensuring high-fidelity pattern conversion through virtual tester environments.
• Execute GLS and timing-annotated (SDF) simulations using industry-standard EDA tools.
• Generate and convert ATE patterns utilizing virtual tester environments to ensure high-fidelity translation from simulation.

Information collected and processed as part of your Google Careers profile, and any job applications you choose to submit is subject to Google's Applicant and Candidate Privacy Policy.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy, Know your rights: workplace discrimination is illegal, Belonging at Google, and How we hire.

If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

To all recruitment agencies: Google does not accept agency resumes. Please do not forward resumes to our jobs alias, Google employees, or any other organization location. Google is not responsible for any fees related to unsolicited resumes.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.