Enable job alerts via email!

CPU Power Engineer - Full-time

Rival

Fort Collins, Austin, Portland, Santa Clara (CO, TX, OR, CA)

On-site

USD 200,000 - 230,000

Full time

9 days ago

Boost your interview chances

Create a job specific, tailored resume for higher success rate.

Job summary

A leading technology company is seeking candidates for a pivotal role in CPU power design and optimization. The position involves collaboration with architecture and design verification teams to drive power-efficient designs. This role requires significant experience in power design and a strong background in electrical engineering. Ideal candidates will have a deep understanding of CPU architecture and related tools, with a focus on delivering innovative solutions under tight deadlines.

Qualifications

  • 8 to 15 years experience in CPU power design.
  • RISC-V architecture familiarity is a plus.
  • Experience in silicon design flow and evaluating PPA tradeoffs.

Responsibilities

  • Drive power design for CPU blocks across multiple teams.
  • Analyze trade-offs between CPU power and performance.
  • Collaborate on power simulations and estimations.

Skills

CPU power design
Benchmarking
Modeling
Simulation
Python
TCL
Device physics

Education

EE/EECS degree

Tools

EDA tools
Verilog
SystemVerilog

Job description

Rivos Power team is seeking highly motivated candidates to develop and strategically drive state-of- the-art CPU power design, modeling, and optimization. The ideal candidate should have in-depth experience and skills for full spectrum silicon power reduction based on solid power analysis, benchmarking and design optimization on all levels including arch, uArch, implementation and binning on CPU blocks, and standard power-performance benchmarking.

You will have the opportunity to work with architecture, uArch design, design verification, circuit and physical design, and silicon validation teams to drive towards a power-efficient design.Rivos Power Design team is seeking highly motivated candidates to perform power design for the new high performance power efficient SOC designs. The role will be at the center of a state-of-the-art power design effort, interfacing with all disciplines and have a critical impact on getting products to market quickly.


Responsibilities
  • Drive the task of power design for CPU blocks across different teams including Arch, uArch, implementation, performance, DV and testing teams.
  • Model and own uses-cases and workloads for custom silicon working closely with the CPU architecture, Performance and IP teams to determine the overall power requirements.
  • Analyze and deploy trade offs between CPU power and performance and drive detailed cost/benefit analysis and making recommendations for power reduction.
  • Create test vectors with the performance, design verification and RTL teams to model the appropriate work loads, and the correct functionality scenarios for simulation
  • Own power simulations, analysis, tuning, correlation, and rollup to the architecture, logic design, and physical design teams.
  • Collaborate with the CAD and Physical design implementation teams on power estimation, simulation flow, and regression analysis
  • Interact with software and system level teams to influence SoC and product level power
Requirements
  • 8 to 15 years experience in CPU power design including design analysis, benchmarking, modeling and simulation..
  • Experience and working knowledge of CPU architectures and workload modeling for power. RISC-V architecture familiarity and experience is a plus.
  • Familiarity with Verilog and SystemVerilog RTL coding
  • Experience in silicon design flow and evaluating PPA tradeoffs at architecture, logic and circuit design levels
  • Knowledge of device physics, advanced process technology and circuit design fundamentals is a plus
  • Experience in state-of-the art EDA tools for gate and transistor level power modeling and simulations.
  • Python, TCL and other scripting languages
  • Aptitude to problem-solve on the fly, innovate, drive decisions and bring the team along to deliver under aggressive schedules
Education and Experience
  • EE/ EECS degree with 8-15 years of industry experience

$200,000 - $230,000 a year

Get your free, confidential resume review.
or drag and drop a PDF, DOC, DOCX, ODT, or PAGES file up to 5MB.

Similar jobs

CPU Power Engineer - Full-time

Rival

Austin null

On-site

On-site

USD 200,000 - 230,000

Full time

2 days ago
Be an early applicant

Senior System Performance and Power Engineer

NVIDIA Corporation

Santa Clara null

On-site

On-site

USD 168,000 - 311,000

Full time

7 days ago
Be an early applicant

Hardware Engineer - Power

Cisco

Austin null

On-site

On-site

USD 149,000 - 215,000

Full time

8 days ago

Senior ASIC Power Engineer

NVIDIA Corporation

Santa Clara null

On-site

On-site

USD 136,000 - 311,000

Full time

9 days ago

Power Systems Engineer

AECOM

Sunnyvale null

On-site

On-site

USD 144,000 - 211,000

Full time

Today
Be an early applicant

Staff Power Systems Engineer

-

San Jose null

On-site

On-site

USD 168,000 - 224,000

Full time

Yesterday
Be an early applicant

AirPods Analog Engineer - Power

Apple Inc.

Cupertino null

On-site

On-site

USD 175,000 - 313,000

Full time

6 days ago
Be an early applicant

Senior Mechanical Power Engineer

HDR

Nashville null

On-site

On-site

USD 108,000 - 205,000

Full time

11 days ago

Senior Mechanical Power Engineer

HDR

Pennington null

On-site

On-site

USD 108,000 - 205,000

Full time

14 days ago