CPU Physical Design Engineer: RTL Feasibility & PPA

NUVACORE

Austin (TX)

On-site

USD 140,000 - 220,000

Full time

35 hours ago
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Job summary

NUVACORE is building ground-up high performance, low-power CPU for next-generation compute workloads. As a CPU Physical Design (PD) Engineer, you will focus on providing power, performance, and area feedback to the RTL team to ensure the design achieves all metrics and targets.

You will lead RTL/micro-architecture feasibility studies, drive PPA outcomes for CPU units with emphasis on timing closure and power optimization, and collaborate cross-functionally with CPU owners, CAD, RTL, and

Qualifications

  • BS or MS in Electrical Engineering or Computer Science with 5+ years (Individual Contributor) or 12+ years (Lead) in CPU physical design.
  • Strong understanding of µArch concepts and PD sign-off workflows.
  • Experience with RTL synthesis, floor planning, timing analysis, ECOs, and end-to-end PD closure.

Responsibilities

  • Lead RTL/micro-architecture feasibility studies and provide actionable feedback to design teams.
  • Drive PPA outcomes for CPU units with focus on timing closure and power optimization.
  • Collaborate with CPU owners, CAD, RTL, and performance modeling teams.
  • Own the RTL intake process for the PD team and ensure design readiness before RTL handoff.

Skills

CPU PD experience
RTL feedback
Timing analysis
EDA tooling
Tape-out history
Cross-functional collaboration
Communication skills

Education

BS or MS in EE/CS

Tools

Synopsys
Cadence

Job description

NUVACORE is building ground-up high performance, low-power CPU for next-generation compute workloads. As a CPU Physical Design (PD) Engineer, you will focus on providing power, performance, and area feedback to the RTL team to ensure the design achieves all metrics and targets.

You will lead RTL/micro-architecture feasibility studies, drive PPA outcomes for CPU units with emphasis on timing closure and power optimization, and collaborate cross-functionally with CPU owners, CAD, RTL, and

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