CPU Performance Architect — Optimize & Innovate

Apple Inc.; United States; On-site; USD 180,000 - 280,000; Full time

Job summary

Apple Inc. is seeking a senior CPU performance architect to lead architectural features, collaborate with RTL and implementation teams, and drive performance optimization across workloads. The role focuses on developing simulators and tools to analyze and improve CPU performance and power.

You will work with software and system teams to profile critical workloads, identify bottlenecks, and correlate RTL performance with simulations. A BS with 10+ years of experience in this domain is required.

Qualifications

• BS degree in a relevant field is required.
• 10+ years of industry experience in CPU performance.
• Experience in CPU performance architecture, micro-architecture design, and performance analysis.
• Experience using C/C++ in a performance-oriented environment.

Responsibilities

• Architect cutting-edge CPU performance features in collaboration with RTL and implementation teams.
• Identify and devise solutions for hardware and software performance bottlenecks.
• Develop advanced CPU performance simulator and associated infrastructure.
• Develop new performance exploration and correlation tools and processes.
• Collaborate with software and system teams to identify, profile, and optimize critical workloads for CPU performance and power.
• Correlate performance of RTL with CPU performance simulator.

Skills

CPU performance architecture

Micro-architecture design

Performance analysis

Performance modeling

C/C++

Education

BS in Electrical Engineering / Computer Engineering / Computer Science

Tools

C/C++

Job description

Apple Inc. is seeking a senior CPU performance architect to lead architectural features, collaborate with RTL and implementation teams, and drive performance optimization across workloads. The role focuses on developing simulators and tools to analyze and improve CPU performance and power.

You will work with software and system teams to profile critical workloads, identify bottlenecks, and correlate RTL performance with simulations. A BS with 10+ years of experience in this domain is required.