CPU Microarchitecture & Cache RTL Design Engineer

Advanced Micro Devices, Inc.; Fort Collins (CO); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD’s Cores Organization is seeking an experienced VLSI RTL Design Engineer to join as a senior technical contributor in Fort Collins, CO. You will design high-performance, energy-efficient Cache and Fabric solutions and contribute to next-generation cores and caches, mentoring other engineers while collaborating across disciplines.

The role emphasizes creativity, analysis, and problem-solving, with cross-functional teamwork to improve chip performance, power efficiency, and area.

Qualifications

• Bachelor’s or master’s degree in computer engineering, electrical engineering, or related field.
• Experience delivering complex RTL and cache designs.
• Strong analytical and collaborative skills.

Responsibilities

• Collaborate with Cache and CPU Architects to design optimized high-performance Cache and Routing Fabric designs.
• Collaborate with Physical Design teams to develop RTL optimized for physical implementation and timing closure.
• Collaborate with Design Verification teams to develop architectures that are clearly documented and verifiable.
• Collaborate with Design for Test teams to develop RTL that is reliable, testable, and manufacturable.
• Work across global teams to solve architectural interactions between IP and SoC designs.
• Develop improvements to CPU designs by increasing quality and simplifying design complexity through innovation.
• Create technical presentations for peers and management and mentor engineers.

Skills

Cache architecture

Cache Controller

RTL design

Verilog HDL

Scripting

CPU Coherency

NoC

Digital design

Education

Bachelor’s or Master’s degree in Computer/Electrical Engineering

Tools

Verilog HDL tools

Scripting languages

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

AMD’s Cores Organization delivers advanced CPU, Cache, and Chiplet technologies that are foundational to AMD’s server, client, and gaming products. We are seeking an experienced VLSI RTL Design Engineer to join our team as a senior technical contributor. In this role, the engineer will design and implement high-performance, energy-efficient cache and fabric solutions. This individual will contribute to the development of AMD’s next generation cores and caches while collaborating with a broad range of engineering disciplines. The engineer will join the team based in Fort Collins, CO.

THE PERSON:

The ideal candidate has experience delivering complex technical projects and achieving results within project timelines. As a Microarchitecture and RTL contributor for Cache designs, this individual enjoys collaborating with cross-functional teams that span a variety of technical disciplines.

Our team continuously seeks innovative approaches to improve chip performance, power efficiency, and area optimization. Success in this role requires creativity, strong analytical and problem-solving skills, and effective written and verbal communication abilities. The candidate enjoys solving challenging technical problems, working collaboratively to develop solutions, and contributing to the success of multiple AMD products.

As the organization continues to grow in capability and scale, the candidate will have opportunities to mentor engineers, share technical expertise, and support the development of team capabilities.

KEY RESPONSIBILITIES:

• Collaborate with Cache and CPU Architects to design, document, and execute optimized high-performance Cache and Routing Fabric designs.
• Collaborate with Physical Design teams to develop RTL optimized for physical implementation and timing closure.
• Collaborate with Design Verification teams to develop architectures and features that are clearly documented and verifiable.
• Collaborate with Design for Test teams to develop RTL that is reliable, testable, and manufacturable.
• Work across global teams to solve complex architectural interactions between IP and SoC designs.
• Develop improvements to CPU designs by increasing quality, simplifying design complexity through innovation, and strengthening technical collaboration across teams.
• Solve complex design and tool challenges through innovative and practical solutions while contributing to technical excellence across the organization. Create technical presentations for peers and management.
• Guide and mentor other engineers.

PREFERRED EXPERIENCE:

• Prior experience with Cache architecture development and execution, including Cache Controller and Array RTL implementation.
• Prior experience with CPU Coherency, Coherent NoC, Cache Allocation and Replacement Policy, Quality of Service, Fairness, and Forward Progress architecture and implementation.
• Prior experience collaborating effectively with diverse teams across disciplines.
• Prior experience with Digital RTL Design, Verilog HDL, and scripting.

ACADEMIC CREDENTIALS:

• Bachelor’s or master’s degree in computer engineering, Electrical Engineering, or a related technical field.

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.