CPU Cache Architect

Advanced Micro Devices, Inc.; Fort Collins (CO); Hybrid; USD 120,000 - 180,000; Full time

Job summary

Advanced Micro Devices, Inc. (AMD) in Fort Collins, CO seeks a highly experienced design engineer to lead performance modeling, analysis, and microarchitecture development for next‑generation cores and caches.

You will collaborate with a small team of hardware and software engineers to optimize CPUs, caches, and interconnects, and build cycle-accurate simulators. The role requires strong analytical skills, detail orientation, and a track record of meeting deadlines in long‑timeline projects.

Qualifications

• C++ programming and scripting language capabilities.
• Computer architecture background with processor, cache, and interconnect experience.
• Familiarity with Digital RTL Design and Verilog HDL; experience writing and debugging RTL.
• Experience collaborating in cross-disciplinary teams to drive project success.

Responsibilities

• Collaborate with hardware and software engineers to optimize CPU, cache, and interconnect performance.
• Develop and enhance cycle-accurate core, cache, and SoC performance simulators.
• Develop simulators at different abstraction levels.
• Use simulators, analytical methods, emulation, and post-silicon observation to evaluate microarchitecture improvements.
• Develop and improve tools and methodologies for performance analysis of workloads.
• Guide and mentor junior engineers.

Skills

C++ programming and scripting language

Computer architecture

Verilog HDL

RTL design

Education

BS/MS/PhD in EE, CS, CSE

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

AMD’s Cores Organization delivers industry leading CPU’s and caches that are the foundation of AMD’s server, client, and gaming business. We are looking for a very experienced design engineer to join this innovative team as a technical expert and work in the areas of performance modeling, performance analysis, and microarchitecture development. The candidate will be a key contributor and leader for AMD’s next generation cores and caches. The candidate will join the team based in Fort Collins, CO

THE PERSON:

The candidate should have strong analytical thinking and problem-solving skills with excellent attention to details. We work on programs with long timelines, so self-motivation and a commitment to meeting deadlines is required. We are pushing the envelope on chip performance, so the status quo must be challenged on every program. This requires creativity and innovation, but also excellent verbal and written communication skills. We work in small teams, but we are part of a large cross-site Core’s organization, so teamwork is also vital our success.

KEY RESPONSIBILITIES:

• Collaborate with a small, dedicated team of hardware and software engineers to optimize the performance of CPUs, caches, and interconnect.
• Develop and enhance cycle-accurate core, cache, and SoC (System on a chip) performance simulators.
• Develop other simulators at different abstraction levels.
• Use those simulators as well as analytical methods, emulation, and post-silicon observation and experimentation to develop and evaluate microarchitecture improvements.
• Develop and improve tools and methodology for performance analysis of workloads.
• Guide and mentor junior engineers.

PREFERRED EXPERIENCE:

• C++ programming and scripting language capabilities
• Computer architecture background with industry experience in architecting processors, caches, and interconnect.
• Familiarity with Digital RTL Design, Software Development, Verilog HDL. Experience writing and debugging RTL.
• Experience collaborating effectively towards the success of a project byworking closely with a diverse team across disciplines.

ACADEMIC CREDENTIALS:

• BS/MS/PhD in EE, CS, CSE (or similar), and expertise in hardware design preferred

LOCATION:

US Fort Collins preferred, remote may be a possibility

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.