CPU Memory Performance Architect

Apple Inc.; Beaverton (OR); On-site; USD 180,000 - 250,000; Full time

Job summary

Apple Inc. in Beaverton, Oregon, seeks a CPU Performance Architect focused on memory subsystem design.

You will help define and optimize cache and memory hierarchy, analyze bottlenecks, and collaborate with CPU and SoC designers to assess feasibility through modeling and RTL feedback. The role emphasizes data-driven decisions, simulation upkeep, and advancing performance for iPhone, iPad, Mac, and server CPUs.

Qualifications

• Experience in CPU and SOC architecture and micro-architecture.
• Experience with performance simulation environments.
• Object-oriented programming in C/C++.
• Experience in a scripting language such as Perl or Python.

Responsibilities

• Identify bottlenecks in memory subsystem and propose optimizations.
• Collaborate with CPU/SoC designers to assess feasibility through modeling and RTL feedback.
• Maintain and improve the simulation environment to enable data-driven decisions.
• Analyze single-threaded and multi-threaded workloads to guide design directions.

Skills

CPU memory architecture

C/C++ programming

Perl or Python scripting

Education

MS or PhD in Electrical/Computer Engineering or CS

Job description

Apple Inc. in Beaverton, Oregon, seeks a CPU Performance Architect focused on memory subsystem design.

You will help define and optimize cache and memory hierarchy, analyze bottlenecks, and collaborate with CPU and SoC designers to assess feasibility through modeling and RTL feedback. The role emphasizes data-driven decisions, simulation upkeep, and advancing performance for iPhone, iPad, Mac, and server CPUs.