CPU Design Verification Lead (Austin/Santa Clara)

NUVACORE, Inc.; Austin, Northern (TX, KY); Hybrid; USD 180,000 - 260,000; Full time

Job summary

NUVACORE, Inc. seeks a Design Verification Lead to guide a team validating a high-performance CPU design. You will oversee pre-silicon verification, establish methods, and drive post-silicon readiness. Proven DV leadership and extensive CPU verification experience are required.

You will build test environments, create stimuli, assess coverage, and ensure correctness through C/C++, SystemVerilog, and formal methods. Strong communication and mentoring skills are essential.

Qualifications

• BS or MS with 15+ years experience in CPU verification.
• Understanding in architecture and design practices and trade-offs in verification.
• Experience with one or more ISA (RISC-V, ARM64, x86).
• Strong communication and debugging skills for CPUs.
• Experience in C, C++, SystemVerilog, scripting (Perl/Python).
• Experience managing and mentoring DV engineers.

Responsibilities

• Build test environments targeting CPU unit, core, or system to find weaknesses.
• Develop methodologies and flows for simulations and regression results.
• Create test stimuli and coverage metrics for unit and top levels.
• Develop golden models and checkers for test bench infrastructure.
• Triage issues and write detailed bug reports for design fixes.
• Develop detailed test plans for CPU units, cores, or system.
• Develop DV methodologies and best practices for the team.
• Test and debug CPU performance against performance models.
• Write tests in ASM, C, C++, or other languages to verify correctness.
• Leverage formal methods to assess design correctness.
• Set up accelerated test environments such as emulation for high performance testing.

Skills

CPU verification

ISA knowledge (RISC-V/ARM64/x86)

SystemVerilog

C/C++

Scripting (Python/Perl)

DV team leadership

Education

BS or MS in EE/CS

Job description

NUVACORE, Inc. seeks a Design Verification Lead to guide a team validating a high-performance CPU design. You will oversee pre-silicon verification, establish methods, and drive post-silicon readiness. Proven DV leadership and extensive CPU verification experience are required.

You will build test environments, create stimuli, assess coverage, and ensure correctness through C/C++, SystemVerilog, and formal methods. Strong communication and mentoring skills are essential.