CPU Design Methodology Engineer

2100 NVIDIA USA; Hillsboro (OR); On-site; USD 136,000 - 264,500; Full time

Job summary

NVIDIA seeks a CPU Design Methodology Engineer in Hillsboro, OR to define scalable SOC design methodologies and automation tools. You will collaborate across ASIC, Physical Design, CAD, and software teams to advance RTL integration and chip build processes.

You will optimize front-end flows, improve design quality, and contribute to automation solutions that accelerate SOC creation while aligning with NVIDIA's innovative chip roadmap.

Qualifications

• Masters in Computer or Electrical Engineering or equivalent experience.
• 5+ years of experience in chip design, specializing in SOC integration and design automation.
• Excellent analytical and problem-solving skills.
• Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation.
• Strong coding skills in Perl, Python, or other industry-standard scripting languages.
• Experience in synthesis and physical design is a plus.
• Good interpersonal skills.

Responsibilities

• Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner
• Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to address them
• Own front-end design quality checks and reviews to present the physical design team with high-quality RTL

Skills

RTL design

SystemVerilog

UVM

Perl/Python scripting

SOC integration

Analytical thinking

Interpersonal skills

Education

Master's in Computer/ Electrical Engineering

Tools

Verilog

UVM

SystemVerilog

Synthesis

Job description

We are now looking for a CPU Design Methodology Engineer!

The complexity of chip development has greatly increased over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand in a footprint that is responsible to our environment. The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, RTL integration, and chip build and assembly. You should be passionate about developing methodologies and automation solutions that enable SOC creation in the most optimized way. In this position, you will get the chance to build complex chips and interact directly with unit-level ASIC, Physical Design, CAD, Package Design, Software, DFT and other teams.

What you’ll be doing:

• Define and develop system-level methodologies and tools to build SOCs in an efficient and scalable manner
• Identify inefficiencies and improvement opportunities in the front-end chip implementation process and propose ideas to address them
• Own front-end design quality checks and reviews to present the physical design team with high-quality RTL

What we need to see:

• A Masters in Computer or Electrical Engineering or equivalent experience
• 5+ years of experience in chip design, specializing in SOC integration and design automation
• Excellent analytical and problem-solving skills
• Experience in RTL design (Verilog), verification (UVM, System Verilog), System-On-Chip design/integration flow, and design automation
• Strong coding skills in Perl, Python, or other industry-standard scripting languages
• Experience in synthesis and physical design is a plus
• Good interpersonal skills.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We employ some of the most forward-thinking and hardworking people in the world. Are you passionate about becoming a part of an outstanding team supporting the latest in CPU technology? If so, we want to hear from you.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.