Co-op: ASIC Design & Verification Engineer

Ciena; New York (NY); On-site; USD 37,195 - 51,660; Full time

Benefits offered by this job

Employee Assistance Program

Company-paid holidays

Paid sick leave

Vacation pay

Job summary

Ciena is seeking a coop student to join their ASIC IP team in New York, NY. The role involves contributing to digital ASIC design and verification, focusing on the Client sub-systems and cores. Candidates should be in good academic standing in Electrical or Computer Engineering.

The position offers an hourly pay range of $27.00 - $37.50 and the opportunity to learn about optical networking and digital ASIC development within Ciena's innovative environment.

Qualifications

• Good academic standing in a Bachelor's degree program in Electrical Engineering or Computer Engineering.
• Previous experience with ASIC or FPGA development.
• Strong verbal and technical writing skills.

Responsibilities

• Working within the ASIC IP team performing digital ASIC design and verification.
• Contributing to the design and verification of complex digital blocks and subsystems.
• Implementing and verifying digital designs using System Verilog/UVM.

Skills

ASIC development

System Verilog

Python

Verilog

VHDL

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Job description

Ciena is seeking a coop student to join their ASIC IP team in New York, NY. The role involves contributing to digital ASIC design and verification, focusing on the Client sub-systems and cores. Candidates should be in good academic standing in Electrical or Computer Engineering.

The position offers an hourly pay range of $27.00 - $37.50 and the opportunity to learn about optical networking and digital ASIC development within Ciena's innovative environment.