Circuit Design Engineer - New Grad 2026 (Remote)

NVIDIA Corporation; Santa Clara (CA); On-site; USD 116,000 - 189,750; Full time

Benefits offered by this job

Equity

Benefits

Job summary

NVIDIA Corporation seeks a Circuit Design Engineer to advance cutting-edge processor designs in deep submicron tech. You will work with a global circuits team on digital, mixed-signal, and security-focused IPs, from design to deployment.

Ideal candidates have a strong background in transistor-level analysis, Spice simulations, and RTL/verification, with scripting for automation and prior leadership experience.

Qualifications

• Master's or PhD in Electrical Engineering or Computer Engineering (or equivalent).
• Experience with deep submicron process issues and digital circuit design techniques.
• Familiarity with analog/mixed-signal block design (op-amp, comparator, ADC).
• Hands-on Spice/EM/IR analysis and static timing analysis/closure.
• Experience with noise analysis, Monte Carlo, loop stability analysis, AC/DC/transient analysis.

Responsibilities

• Develop and participate in cutting-edge processor design in deep submicron technologies.
• Collaborate with cross-functional teams to improve performance, reliability and security of NVIDIA products.
• Design and hardware implementation of digital and mixed-signal IPs for sensing and security detection.
• Create prototypes on test chips and drive deployment across product lines.
• Mentor junior team members and lead technical efforts.

Skills

Circuit design

Transistor-level analysis

Team collaboration

Leadership

Scripting automation

Education

Master's or PhD in Electrical/Computer Engineering

Tools

Spice simulations

RTL synthesis & verification

Place & Route

Job description

NVIDIA Corporation seeks a Circuit Design Engineer to advance cutting-edge processor designs in deep submicron tech. You will work with a global circuits team on digital, mixed-signal, and security-focused IPs, from design to deployment.

Ideal candidates have a strong background in transistor-level analysis, Spice simulations, and RTL/verification, with scripting for automation and prior leadership experience.