(Career Fair) Process Integration Engineer

Nokia; Sunnyvale (CA); On-site; USD 90,000 - 130,000; Full time

Job summary

Nokia in Sunnyvale, CA is seeking a Process Integration Engineer to ensure high quality InP-based PIC products through experiments and data analysis. You will help bring up a new high-volume fab in San Jose, CA and collaborate with cross-functional teams to improve wafer fabrication processes and yield reliability.

You will troubleshoot yield and performance issues, support failure analysis, and use MES software to collect data and generate reports, while driving process stability and capability

Qualifications

• 2+ years of semiconductor fab experience.
• Understanding of semiconductor processes and device physics.
• Experience with SPC methods.
• Familiarity with epitaxy, wet etching, plasma etching, metal deposition, and photolithography.

Responsibilities

• Troubleshoot performance and yield issues in the wafer fab.
• Investigate causes for lots on hold and drive corrective actions.
• Support failure analysis: visual inspections, CD-SEM, IV sweeps, profilometer depth measures.
• Use MES to collect data, analyze, and generate reports.
• Review SPC charts and respond to out-of-control events.
• Coordinate movement of qual and development lots through fab, assembly, and test.
• Manage quality and yield of PIC wafers using fab knowledge and test data.
• Tighten process deviations and test failures via data history analysis.
• Establish inline FAB process specifications.
• Support process engineering to improve stability and capability.
• Support operations to improve throughput and cycle time.
• Assist next-gen PIC platform development and tech transfer ramp.

Skills

Statistical process control

Data analysis

Root cause analysis

Quality focus

Team collaboration

Verbal and written communication

Education

B.S. or higher in Electrical Engineering, Photonics, Physics, or Materials Science

Tools

MES software

PowerPoint

Job description

Job Description

In the position of Process Integration Engineer, you will ensure high quality and reliability of InP-based Photonic Integrated Circuit (PIC) products through extensive experiments and data analysis. You will have the opportunity to help bring up our new high-volume fab in San Jose, CA. You will work with various functional teams to troubleshoot and improve wafer fabrication processes and drive improvements in yield reliability

Your Key Responsibilities

• Troubleshoot challenging performance and yield issues in the wafer fab
• Investigate the reason and root cause for lots being put on hold
• Provide support for engineers with failure analysis – visual inspections, CD-SEM work, electrical IV sweeps, profilometer depth measurements, etc.
• Use Manufacturing Engineering System (MES) software to help with integration engineering activities – collect data, perform basic data analysis, generate Power Point reports, etc.
• Routine review of SPC charts and initial response for out-of-control events
• Coordinate and follow movement of qual and development lots through fab, assembly, and test areas
• Manage quality and yield of PIC wafers based on knowledge of fab processes, device physics, and the analysis of test and reliability data
• Troubleshoot and resolve process deviations and test failures through a detailed analysis of test data and process history
• Establish and maintain inline FAB process specifications.
• Support Process Engineering to improve process stability and capability
• Support Operations to improve throughput and cycle time
• Support next-generation PIC platform development and participate in technology development, transfer, and ramp activities to meet yield, reliability and device performance goals
• Help to assure compliance with PIC product quality system

Minimum Knowledge/Skills/Abilities

• At least 2 years of experience working in a modern semiconductor fab which places a high premium on quality.
• Understanding of semiconductor processes and device physics
• Understanding of statistical process control methods
• Familiarity with or direct experience in most of the standard semiconductor process technologies required for wafer fabrication such as epitaxy, wet etching, plasma etching, metal deposition, and photolithography
• Strong focus on quality and attention to detail
• Eager to learn and expand skill set
• Strong follow-up skills and problem-solving ability and drive
• Takes ownership for tasks and projects
• Team-player with good communication skills, verbal and written
• Ability to organize data and keep track of several simultaneous projects and deadlines

Education Required

• B.S. or higher in Electrical Engineering, Photonics, Physics, or Materials Science with at least 2 years of semiconductor fab experience.