Build System Lead- CPU Cores

Socket.dev; Town of Fishkill (NY); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD is seeking an LSF infrastructure lead to transition from legacy build systems to modern, hyperscale builds for next-generation products in Fishkill, NY. You will maintain and improve verification methods, drive build system modernization, and partner with RTL/Design teams to align long-term automation strategies.

The role emphasizes technical leadership, scalable infrastructure, and a strong focus on performance, reliability, and collaboration across silicon design, CAD, and software teams.

Qualifications

• Experience with functional verification of microprocessor designs or similar complex chips.
• Proficiency in Verilog/SystemVerilog HDL and programming languages (Perl, C/C++).
• Deep expertise in build systems, orchestration, and large-scale silicon or software environments.

Responsibilities

• Lead design, development, and optimization of scalable build infrastructure to reduce model build times and boost productivity.
• Drive modernization of build systems to support Zen architecture and future CPU cores.
• Improve compute resource utilization and LSF farm efficiency via caching, artifact reuse, and eliminating redundant builds.

Skills

Verilog/SystemVerilog HDL

Perl

C/C++

LSF/workload management

Education

BS or MS in CS/EE

Tools

LSF

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future.

Whether you're redesigning next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger-technology that moves the world forward. Join us and, together, we'll advance your career.

THE ROLE:

We are looking for a LSF infrastructure lead to transition from legacy build systems to modern hyperscale build our next generation products. You will maintain and improve existing functional verification methodology, improve existing infrastructure, and work on related projects and/or assignments as needed to meet team goals. Additionally, you will perform project definition, training and documentation. Finally, you will work with architects and TG/PG RTL/Designers and develop an effective working relationship with parties involved.

THE PERSON:

The ideal candidate will have good communication skills and the ability to work with a team with varied strengths. A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBILITIES:

• Lead the design, development, and optimization of scalable build infrastructure to significantly reduce model build turnaround times and improve engineering productivity.
• Drive organization-wide build system modernization initiatives, enabling efficient support for Zen architecture, and future CPU core development programs.
• Improve compute resource utilization and LSF farm efficiency through build caching, artifact reuse, and elimination of redundant build processes.
• Architect and implement hyperscale build solutions that enhance performance, reliability, and scalability across AMD's silicon design environments.
• Provide technical leadership and subject matter expertise for the transition from legacy build systems to next-generation build architectures.
• Partner with silicon design, CAD, infrastructure, and software engineering teams to define and execute long-term build and automation strategies.
• Establish best practices, standards, and roadmaps for build infrastructure, continuous integration, and large-scale engineering workflows.

PREFERRED EXPERIENCE:

• Understanding or technical expertise in functional verification of microprocessor designs
• Experience with Verilog/SystemVerilog HDL, programming in Perl, C/C++
• Deep expertise in build systems, build orchestration, and large-scale software or silicon development environments.
• Strong experience designing and operating distributed or hyperscale build infrastructure.
• Proven track record improving build performance, reducing turnaround time, and increasing engineering productivity at scale.
• Experience with compute farm scheduling technologies (e.g., LSF or similar workload management platforms).
• Strong understanding of build caching, artifact management, dependency optimization, and build reproducibility techniques.
• Experience supporting semiconductor design workflows, EDA environments, or chip development programs.
• Demonstrated ability to lead complex infrastructure transformation initiatives across multiple engineering organizations.
• Excellent collaboration and communication skills with the ability to influence technical direction across cross-functional teams.
• Experience driving automation, CI/CD, and infrastructure scalability in high-performance engineering environments.

ACADEMIC CREDENTIALS:

• BS or MS with some industry experience desired (all degrees are related to CS or EE)

LOCATION:

Fishkill, NY

This role is not eligible for Visa Sponsorship

#LI-AJ1

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.

This posting is for an existing vacancy.