Board-Level Hardware Engineer - Data Center Servers

NUVACORE; Santa Clara (CA); On-site; USD 150,000 - 220,000; Full time

Job summary

NUVACORE is building a ground-up high-performance, low-power CPU platform for data center workloads. We seek a Hardware Board Design Engineer to drive architecture, schematic capture, PCB layout oversight, and lab bring-up for future server solutions.

You will collaborate with cross-functional teams to implement PCIe Gen6/Gen7, DDR5/LPDDR6, and robust PDN while delivering scalable, energy-efficient hardware.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering.
• 5+ years in high-speed hardware board design for data-center gear.
• Proficient in Cadence Allegro, OrCAD, or Altium; strong schematic and layout skills.
• Experience with PCIe/DDR/USB and SI/PI constraints.
• Experience with DC-DC converters and multi-phase VRMs.

Responsibilities

• Lead architecture and design of HDI server motherboards and baseboards.
• Own schematic capture, hierarchical designs, and component selection.
• Collaborate with layout, packaging, SI/PI, and software teams.
• Design power delivery paths and thermal management for high-current CPUs.
• Lead bring-up, validation, and debugging on prototype boards.
• Support manufacturing with fabrication docs and DFM/DFT considerations.

Skills

Board-level design

HDI server boards

High-speed interfaces

Power delivery design

Lab debugging

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree (Nice to have)

Tools

Cadence Allegro

Concept HDL

OrCAD

Altium Designer

Ansys SIwave/HFSS

Cadence Sigrity

HyperLynx

DMMs/Scopes/Network analyzers

Job description

NUVACORE is building a ground-up high-performance, low-power CPU platform for data center workloads. We seek a Hardware Board Design Engineer to drive architecture, schematic capture, PCB layout oversight, and lab bring-up for future server solutions.

You will collaborate with cross-functional teams to implement PCIe Gen6/Gen7, DDR5/LPDDR6, and robust PDN while delivering scalable, energy-efficient hardware.