Associate Digital Design Engineer - RTL & Verification

Analog Devices, Inc.

Chandler (AZ)

On-site

USD 86,000 - 118,000

Full time

2 days ago
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Benefits offered by this job

Medical, vision and dental
401k
Paid vacation and holidays
Sick time

Job summary

Analog Devices, Inc. in Chandler, AZ is seeking a Digital Design Engineer to contribute to the design, development, and verification of digital ICs and systems as part of a cross-functional team.

You will transform product requirements into semiconductor solutions, work with RTL Verilog/SystemVerilog, and participate across the design flow from specification to implementation while collaborating with architecture, verification, and physical design.

Qualifications

  • Solid understanding of digital circuit design fundamentals.
  • Experience with RTL development using Verilog and SystemVerilog.
  • Familiarity with digital design workflows and verification.
  • Knowledge of industry-standard design tools and methodologies.

Responsibilities

  • Contribute to design, implementation and verification of digital circuits.
  • Participate in RTL development from specs through validation.
  • Develop, simulate and verify RTL designs with standard tools.
  • Support synthesis, timing analysis, debugging, and optimization.
  • Collaborate with architecture, verification and product teams.
  • Document design specs and verification results.

Skills

Digital design
Verilog/SystemVerilog
Circuit fundamentals
Design verification
Debugging
Team collaboration

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

EDA tools

Job description

Analog Devices, Inc. in Chandler, AZ is seeking a Digital Design Engineer to contribute to the design, development, and verification of digital ICs and systems as part of a cross-functional team.

You will transform product requirements into semiconductor solutions, work with RTL Verilog/SystemVerilog, and participate across the design flow from specification to implementation while collaborating with architecture, verification, and physical design.

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