ASIC Verification Engineer, Technical Leader

Cisco Systems, Inc.; San Jose (CA); On-site; USD 165,000 - 233,000; Full time

Job summary

Join a leading networking company as an ASIC Verification Engineer and play a pivotal role in designing and verifying cutting-edge ASICs. This position offers a unique blend of a startup culture with the stability of a major player in the industry. Collaborate with talented micro-architects and verification engineers to create innovative solutions that shape the future of networking. You will leverage your expertise in System Verilog and UVM methodology to ensure the successful deployment of complex ASICs, while also mentoring junior engineers. If you are passionate about technology and looking to make a significant impact, this opportunity is perfect for you.

Benefits

Medical insurance

Dental insurance

Vision insurance

401(k) plan

Paid holidays

Flexible vacation time

Sick time off

Paid volunteer time

Employee resource organizations

Performance-based incentives

Qualifications

• 8+ years of experience in ASIC verification with a strong background in System Verilog.
• Demonstrated ability to handle complex chip features independently.

Responsibilities

• Define and build UVM/SystemVerilog testbenches, enhancing existing ones for reuse.
• Lead and mentor junior engineers while ensuring quality delivery.

Skills

System Verilog

UVM methodology

C++

Debugging skills

Code coverage analysis

Education

Bachelor’s degree

Master’s degree

Tools

UVM-based infrastructure

Emulation infrastructure

Job description

ASIC Verification Engineer, Technical Leader

Location:

San Jose, California, US

Area of Interest

Engineer - Hardware

Compensation Range

165700 USD - 232900 USD

Job Type

Professional

AI or Artificial Intelligence, Networking

Job Id

1438583

The application window is expected to close on: 6/10/25

This role will be based out of our San Jose, CA office.

The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from top-of-rack (TOR) switches all the way through web-scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing, and testing some of the most complex ASICs being developed in the industry.

Meet The Team:

Our group offers a unique combination of a startup culture with the benefits of working for the leading networking company in the world. You will engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with cross-functional software and product teams, working together to ensure the successful deployment of the ASIC in products.

Your Impact:

You are a hard-working, motivated ASIC Verification Engineer who will be joining our team and contributing to the verification of very complex ASICs. You will have a Design Verification background, in-depth experience in System Verilog and UVM methodology, with experience working in C++, scripting, as well as ASIC design and verification flow.

• Defining and building UVM/SystemVerilog testbenches from scratch or enhancing existing testbenches with focus on reuse.
• Defining new DV methodologies.
• End-to-end verification of one or more design blocks simultaneously while helping the full chip team with integration and support.
• Test plan generation, review, planning, and execution meeting all criteria of the ASIC group.
• Help develop emulation infrastructure using C/C++ that works with UVM based verification environments.
• Gate level simulation and SDF back annotation for blocks as part of pre-silicon verification.
• Code and Functional coverage based simulation runs, coverage collections, merging, and working with designers to fill coverage holes.
• Participating in all phases during ASIC development – RTL verification, emulation, and post-silicon validation.
• Recommending standard methodology, identifying and suggesting innovative solutions for improvements, efficiency, and quality.
• Leading and mentoring a team of junior engineers in addition to the work you're doing.

Minimum Qualifications:

• Bachelor’s degree +8 years of related experience, or Master’s degree +6 years of related experience.
• Demonstrated experience in C/C++ and debugging skills, with experience in System Verilog and UVM methodology
• Prior experience with developing UVM based infrastructure from scratch.
• Ability to handle complex features/parts of a chip independently.
• Proficient in merging and analyzing code coverage data that is generated by functional simulation

Preferred Qualifications:

• The ability to work in a dynamic environment delivering quality work on a tight schedule.
• Ability to build, lead, and mentor a team of engineers, and ensure quality delivery as a team.

#WeAreCisco

#WeAreCisco where every individual brings their unique skills and perspectives together to pursue our purpose of powering an inclusive future for all.

Our passion is connection—we celebrate our employees’ diverse set of backgrounds and focus on unlocking potential. Cisconians often experience one company, many careers where learning and development are encouraged and supported at every stage. Our technology, tools, and culture pioneered hybrid work trends, allowing all to not only give their best, but be their best.

We understand our outstanding opportunity to bring communities together and at the heart of that is our people. One-third of Cisconians collaborate in our 30 employee resource organizations, called Inclusive Communities, to connect, foster belonging, learn to be informed allies, and make a difference. Dedicated paid time off to volunteer—80 hours each year—allows us to give back to causes we are passionate about, and nearly 86% do!

Our purpose, driven by our people, is what makes us the worldwide leader in technology that powers the internet. Helping our customers reimagine their applications, secure their enterprise, transform their infrastructure, and meet their sustainability goals is what we do best. We ensure that every step we take is a step towards a more inclusive future for all. Take your next step and be you, with us!

Message to applicants applying to work in the U.S. and/or Canada:

When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.

U.S. employees haveaccess to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.

Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days ofvacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Offpolicy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours ofunused sick timewill be carried forwardfrom one calendar yearto the nextsuch that the maximum number of sick time hours an employee may have available is160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.

Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:

.75% of incentive target for each 1% of revenue attainment up to 50% of quota;

1.5% of incentive target for each 1% of attainment between 50% and 75%;

1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.

For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.

Sign up to receive notifications of similar jobs