ASIC Verification Engineer

NVIDIA; Austin (TX); On-site; USD 116,000 - 189,750; Full time

Benefits offered by this job

Equity

Benefits

Diverse work environment

Job summary

NVIDIA is hiring an ASIC Verification Engineer in Austin, Texas, to enhance the testing and verification process for global products. In this role, you'll create test plans and verification infrastructures, ensuring code and functional coverage while collaborating with cross-functional design teams.

A successful candidate should possess a BS/MS in Electrical or Computer Engineering and have over 2 years of design verification experience. Proficiency in SystemVerilog and UVM is essential. The position offers a competitive salary range between $116,000 and $189,750 annually, with additional equity and benefits.

Qualifications

• 2+ years of proven design verification experience.
• Experience in pre-silicon verification using UVM and SystemVerilog.
• Strong out-of-the-box problem-solving abilities.

Responsibilities

• Develop test plans and verification infrastructure for global IP.
• Automate flows and methodologies for efficient RTL verification.
• Collaborate with design teams to resolve verification-related issues.

Skills

Design verification experience

Programming in Perl or Python

Debugging and analytical skills

Communication and collaboration skills

Education

BS/MS in Electrical or Computer Engineering

Tools

UVM

SystemVerilog

dc_shell

VCS

Debussy

GDB

Job description

NVIDIA is looking for an ASIC Verification Engineer to help verify our global IP. This position offers an opportunity to impact an array of products while collaborating with teams from design, architecture, verification, and integration.

What you'll be doing:

• Develop test plans, tests and verification infrastructure for verifying global IP across multiple products
• Define, develop, and automate flows and methodologies to efficiently build, deploy, and verify generated RTL
• Ensure code and functional coverage of all the RTL you will verify
• Build verification components using SV/UVM methodology
• Drive coverage-based verification closure
• Collaborate with design teams across NVIDIA to find corner cases and resolve verification related issues

What we need to see:

• BS/MS in Electrical or Computer Engineering (or equivalent experience)
• 2+ years of proven design verification experience
• Experience in pre‑silicon verification (UVM, SystemVerilog), ASIC design/implementation flow, and design automation
• Programming and scripting experience in Perl or Python
• Excellent debugging and analytical skills
• Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
• Strong communication and collaboration skills to interact within the team and across functional teams

Ways to stand out from the crowd:

• Previous experience automating tasks in the design verification process
• Hands‑on experience in object‑oriented programming
• Prior design or verification experience at the IP or block level
• Experience developing methodologies used by others
• Demonstrated ability to drive a project to completion

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD – 189,750 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until May 24, 2026.

NVIDIA is committed to fostering a diverse work environment and is proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.