ASIC/RTL Design Engineer

netPolarity, Inc. (Saicon Consultants, Inc.); San Jose (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

A leading company in the Semiconductor Manufacturing industry is seeking a Team Lead with expertise in ASIC design for a 1-year contract role. The candidate will be responsible for writing design documentation, collaborating with teams, and implementing automation to enhance efficiency. Experience in SystemVerilog, RTL block design, and strong communication skills are essential. The position offers a competitive salary based on expertise and industry standards in the San Jose area.

Qualifications

• 5-6+ years' experience required.
• Must have proven track record of ASIC design on several production tape-outs.
• Ability to develop clear and concise engineering documentation.

Responsibilities

• Write micro-architecture documentation and implement blocks to meet requirements.
• Collaborate with architecture and hardware teams.
• Participate in silicon bring-up for features owned.

Skills

SystemVerilog

ASIC design

scripting

static timing analysis

Power-saving techniques

strong verbal and written communication

Education

Bachelor's degree

Job description

1 day ago Be among the first 25 applicants

Direct message the job poster from netPolarity, Inc. (Saicon Consultants, Inc.)

Team Lead at netPolarity, Inc. (Saicon Group)

1 year contract W2 Only

Note: NO C2C/Corp to Copr/ 1099

Top 3 skills: Good understanding of SystemVerilog, analyzing existing designs and making modifications, able to understand tools used by ASIC engineers like Lint, CDC, STA, etc. - scripting is nice to have

KEY RESPONSIBILITIES:

• Write micro-architecture documentation and own major portions of the design and implementation of blocks to meet functional, timing, area, and power requirements.

• Collaborate with architecture and hardware teams to understand the requirements.

• Work with verification and physical design teams to achieve high quality design and successful tape out.

• Design and implement logic functions that enable efficient test and debug.

• Participate in silicon bring-up for features owned.

• Contribute in cross-functional teams to solve novel problems across multiple functional areas in development of required features.

• Implement automation to increase design team efficiency.

EXPERIENCE:

Required

• 5-6+ years' experience required

• Must have proven track record of ASIC design on several production tape-outs.

• Experience in Designing RTL block for an SOC.

• Experience in integrating ASIC IP into an SOC.

• Experience with synthesis, static timing analysis & optimizations.

Nice-to-have:

• Experience writing timing constraints and exceptions.

• Experience with automation using scripting techniques such as PERL, Python or Tcl

• Experience in Power-saving techniques.

• Experience with Arm architecture and APB, AXI, CHI protocols.

• Experience with design involving Interconnects.

• Ability to develop clear and concise engineering documentation.

• Ability to organize and present complex technical information.

• Strong verbal and written communication skills

EDUCATION: Bachelor's degree required

Seniority level

• Seniority level

  Mid-Senior level

Employment type

• Employment type

  Contract

Job function

• Job function

  Other

• Industries

  Semiconductor Manufacturing, Computers and Electronics Manufacturing, and Appliances, Electrical, and Electronics Manufacturing

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