ASIC Design Verification Engineer, Digital Signal Processing

Google; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

Google is seeking a verification engineer to shape the future of TPU‑based AI/ML hardware acceleration in Sunnyvale, CA. You will verify complex DSP blocks and high‑speed PHY designs, using fixed‑point math and mixed‑signal co‑simulation to ensure robust performance.

You will define verification strategies for RTL and DSP cores, build scalable UVM environments, and collaborate across RTL, design, and firmware teams to deliver world‑class TPU technology for Google Cloud and consumer products.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 8 years of design verification experience with DSP/communication focus.
• Experience scripting for automation (Python/Perl/Makefile).
• Master's or PhD preferred in EE/CE.
• RNM/SystemVerilog-AMS verification experience.
• Knowledge of adaptive equalization (FFE/DFE) and timing recovery.
• Python, MATLAB, or C/C++ for testbench automation.

Responsibilities

• Verify RTL against reference models (MATLAB/C++/SystemC) with bit-exact, fixed-point methods.
• Verify adaptive equalization loops (FFE/DFE) and timing recovery under impairments.
• Model and verify DSP-Analog Front End interfaces using RNM or SystemVerilog-AMS.
• Develop and maintain scalable UVM-based testbenches and assertions (SVA).

Skills

DV design verification

Scripting (Python/Perl/Makefile)

RNM verification

SystemVerilog-AMS

Adaptive equalization (FFE/DFE)

Python/MATLAB/C/C++ for testbenches

Education

Bachelor's degree in Electrical/Computer Engineering

Master's or PhD in Electrical/Computer Engineering

Tools

MATLAB

SystemVerilog

C/C++

Job description

In most instances, this position requires in-person interviews as part of the hiring process. Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Sunnyvale, CA, USA; Tel Aviv, Israel; Haifa, Israel.

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• 8 years of experience in design verification (DV) with a focus on digital signal processing (DSP), communication systems, or arithmetic logic blocks.
• Experience with scripting in Python, Perl, or Makefile for automation.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related technical field.
• Experience with Mixed-Signal verification techniques such as Real Number Modeling (RNM, SystemVerilog-Wreal) or SystemVerilog-AMS.
• Functional knowledge of adaptive equalization architectures (FFE/DFE) and timing recovery loops.
• Programming proficiency in Python, MATLAB, or C/C++ for testbench automation and reference modeling.

About The Job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting‑edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML‑driven systems.

In this role, you will define and execute the verification strategy for high‑speed Physical Layer (PHY) digital blocks. This role focuses on the functional and mathematical verification of complex DSP algorithms, digital‑analog boundaries, and signal processing logic. This position requires a strong technical foundation in communication theory, fixed‑point arithmetic, and mixed‑signal co‑simulation.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving force behind Google's groundbreaking innovations, empowering the development of our cutting‑edge AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world‑leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Individual pay is determined by factors including job‑related skills, experience, and relevant education or training.

US: $163000 - $236000 (USD) + 15% bonus target + equity + benefits

Responsibilities

Learn more about benefits at Google .

• Verify RTL implementations against high‑level architectural reference models (MATLAB, C++, or SystemC) using bit‑exact and fixed‑point verification methodologies.
• Verify the stability, tracking capability, and convergence of adaptive equalization loops (FFE, DFE) and timing recovery systems under varying channel impairments.
• Model and verify the functional interface between Digital DSP blocks and the Analog Front End (AFE) using Real Number Modeling (RNM) or SystemVerilog‑AMS.
• Design, implement, and maintain scalable UVM‑based simulation environments, SystemVerilog Assertions (SVA), and functional coverage metrics for digital signal processing blocks.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .