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Positron AI seeks an ASIC Design Verification Engineer to lead advanced verification for AI inference ASICs. You will define verification strategies, build robust testbenches, and drive coverage closure across pre- and post-silicon stages.
The role requires 8+ years in ASIC verification, SystemVerilog UVM expertise, and strong collaboration with design and software teams. Remote-friendly, with a competitive package.
As an ASIC Design Verification Engineer, you will play a critical role in ensuring the functional correctness and performance of our AI inference ASICs. You will be responsible for developing and executing advanced verification methodologies, working closely with design, architecture, and software teams to validate our silicon solutions. This is an opportunity to lead a talented team and contribute to the evolution of AI hardware technology.
While this role is currently posted at a specific level, we are a growth-oriented organization and are open to hiring at a more senior level for the right candidate. Please note that this job description serves as a focused but generalized overview of the role; specific responsibilities and impact expectations will be tailored to the experience and seniority of the final hire.
The base salary range for this role is $200,000 – $350,000.
Please note that the figures provided represent the base salary range only and do not include other elements of our total compensation package, equity, or comprehensive benefits.
At Positron AI, we value the unique expertise each candidate brings. While the range above reflects our typical expectation for the position, we reserve the flexibility to exceed this range for candidates whose specialized skills, significant experience, or unique qualifications fall outside the standard scope of the role. Final offers are determined based on a variety of factors, including internal equity, and individual impact.
If you're excited about the role but don't meet every bullet, we'd still love to hear from you.