ASIC Design Verification Engineer

Advanced Micro Devices; Austin (TX); On-site; USD 100,000 - 130,000; Full time

Job summary

A leading semiconductor company in Austin is seeking an ASIC Design Verification Engineer to enhance the development of cutting-edge technologies. The ideal candidate will collaborate with architects, manage verification processes, and ensure high-quality IP delivery. Applicants should have a background in engineering, strong analytical abilities, and familiarity with Verilog, System Verilog, and UVM. This role emphasizes teamwork within an innovative culture, making it vital for candidates to thrive in a fast-paced environment.

Qualifications

• ASIC verification experience.
• Strong understanding of digital design and computer architecture.
• Proficient in Verilog, C/C++, and working in both Linux and Windows environments.

Responsibilities

• Collaborate with IP architects on verification architecture.
• Participate in verification of complex IP blocks.
• Develop and maintain verification environments and test cases.

Skills

Analytical thinking

Problem-solving abilities

Attention to detail

Interpersonal skills

Education

BS/MS in Engineering or Computer Science

Tools

System Verilog

UVM

C/C++

Linux

Windows

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE

The AMD UMC Team (part of the MSIP organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge DDR/LPDDR technologies powering data center and machine learning workloads. This team is part of the development for tomorrow’s clients, server, embedded, graphics, and semi‑custom chips. You will be involved in all aspects of IP verification starting from helping to create a verification architecture, defining test plans, verification environment development, and verification closure/sign‑off.

As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO Team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

THE PERSON

I am a strong analytical thinker with excellent problem‑solving abilities and keen attention to detail. I work well in team environments and communicate effectively, drawing on solid interpersonal skills. A self‑starter by nature, I independently drive tasks to completion and thrive in fast‑paced, multi‑project settings that use state‑of‑the‑art tools and technologies. I maintain a continuous improvement mindset and bring strong expertise as a verification lead and architect.

KEY RESPONSIBILITIES

• Collaborate with IP architects to come up with verification architecture and development plans
• Participate in verification of complex IP blocks and take end‑to‑end ownership of key features for all projects
• Work on test plans, verification environment development, regression, and coverage closure
• Develop, modify and maintain VIP, libraries, verification environments, test cases (random and directed) using System Verilog/UVM/SystemC
• Triaging and debugging regressions
• Analyzing code and functional coverage
• Deploying industry‑leading verification methodologies such as UVM and formal verification
• Reproducing functional bugs found in post‑silicon in dynamic simulation and/or formal verification environments
• Conducting and participating in code reviews
• Develop and maintain scripts and tools to continuously improve engineering infrastructure, methodology and execution

PREFERRED EXPERIENCE

• ASIC verification experience
• Strong understanding of digital design and computer architecture
• Proficient in Verilog, System Verilog, C/C++, UVM, OOP, and working in Linux and Windows environments
• ASIC design knowledge and ability to debug System Verilog RTL code using simulation tools
• Experience in security verification would be an asset

ACADEMIC CREDENTIALS

• BS/MS degree in Engineering (Electrical, Electronics, Computer) or Computer Science

This role is not eligible for Visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.