Applications Engineer

Lattice Semiconductor; United States; On-site; USD 120,000 - 170,000; Full time

Job summary

Lattice Semiconductor is seeking an Application Engineer for DDR technologies in the United States. You will provide design‑in support for DDR4/DDR5/LPDDR, high‑speed interfaces, and related HSIO systems, working with customers to optimize configurations and signal integrity.

You will analyze issues with oscilloscopes, protocol analyzers, and BERTs, and communicate root causes and corrective actions. Collaboration with FAE, sales, and marketing teams will shape product directions and best

Qualifications

• Solid understanding of DDR memory architectures and protocols (DDR4/DDR5 and/or LPDDR).
• Hands on experience supporting silicon products (SoCs, PHYs, controllers, memory interfaces).
• Strong knowledge of High Speed Serial and Parallel IO fundamentals, including: SI, timing, jitter, noise, and PI, Eye diagrams, timing budgets, and channel modeling
• Experience with high speed lab equipment (oscilloscopes, protocol analyzers, BERTs).
• Familiarity with PCB design considerations for high speed interfaces (stack ups, routing, termination).
• Ability to explain complex technical topics clearly to both technical and non technical audiences.
• Strong problem solving and analytical mindset.
• Familiarity with memory training, calibration flows, and PHY tuning.

Responsibilities

• As an Application Engineer, provide applications support for DDR (e.g., DDR4 / DDR5 / LPDDR, High‑Speed IOs, and interfaces (e.g., PCIe, SerDes, Ethernet).
• Support customer design‑ins, including interface configuration, signal integrity guidance, board‑level considerations, and system optimization.
• Analyze issues using oscilloscopes, logic analyzers, protocol analyzers, and BERTs; provide clear root cause and corrective action plans.
• Provide customer feedback to internal teams to influence product requirements, feature prioritization, and roadmap decisions.
• Support FAE, sales, and marketing teams with technical guidance, value propositions, and contribute to best practices for DDR and HSIO system design and debug.
• Stay current on JEDEC standards, protocol specifications, and industry trends related to memory and high‑speed interfaces.

Skills

DDR4/DDR5

High-Speed IO

PCB layout

Signal integrity

Lab instrumentation

Effective communication

Tools

Oscilloscopes

Protocol analyzers

BERTs

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Application Engineering for DDR (e.g., DDR4 / DDR5 / LPDDR, High‑Speed IOs, and interfaces (e.g., PCIe, SerDes, Ethernet)

• As an Application Engineer, provide applications support for DDR (e.g., DDR4 / DDR5 / LPDDR, High‑Speed IOs, and interfaces (e.g., PCIe, SerDes, Ethernet, )
• Support customer design‑ins, including interface configuration, signal integrity guidance, board‑level considerations, and system optimization.
• Analyze issues using oscilloscopes, logic analyzers, protocol analyzers, and BERTs; provide clear root cause and corrective action plans.
• Provide customer feedback to internal teams to influence product requirements, feature prioritization, and roadmap decisions.
• Support FAE, sales, and marketing teams with technical guidance, value propositions, and contribute to best practices for DDR and HSIO system design and debug.
• Stay current on JEDEC standards, protocol specifications, and industry trends related to memory and high‑speed interfaces.

Required Skills

• Solid understanding of DDR memory architectures and protocols (DDR4/DDR5 and/or LPDDR).
• Hands on experience supporting silicon products (SoCs, PHYs, controllers, memory interfaces).
• Strong knowledge of High Speed Serial and Parallel IO fundamentals, including: Signal integrity (SI), timing, jitter, noise, and power integrity (PI), Eye diagrams, timing budgets, and channel modeling
• Experience with high speed lab equipment (oscilloscopes, protocol analyzers, BERTs).
• Familiarity with PCB design considerations for high speed interfaces (stack ups, routing, termination).
• Ability to explain complex technical topics clearly to both technical and non technical audiences.
• Strong problem solving and analytical mindset.
• Familiarity with memory training, calibration flows, and PHY tuning.

Pay & Benefits

Consistent with Lattice Semiconductor values and applicable law, we provide the following information to promote pay transparency and equity. We have a market-based pay structure which varies by location. Please note that the base pay range is a guideline, and our compensation range reflects the cost of labor in the U.S. geographic market based on the location of the role. Pay within these ranges varies and depends on job-related knowledge, skills, and relevant work experience.

For candidates who receive and offer, the starting salary will vary based on various factors including, but not limited to, such qualifications as, skill level, competencies, and work location.The range provided may represent a candidate range and may not reflect the full range for an individual tenured employee.

Base Pay Range

148753.481

• In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity.
• In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in the United States.

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.