Product Test Engineer

Lattice Semiconductor; Hillsboro (OR); On-site; USD 110,000 - 150,000; Full time

Benefits offered by this job

Healthcare benefits

Retirement plan

Paid time off

Job summary

Lattice Semiconductor is seeking an experienced test engineer in Hillsboro, Oregon to develop and validate test content for chip IPs. You will design test circuits, automate generation, and perform Pre-Si and Post-Si verification across temperature and voltage conditions.

Responsibilities include identifying root causes, driving issues to closure with cross-functional teams, and delivering test content on schedule for internal and external customers.

Qualifications

• BS or MS in Electrical/Electronics/Computer Engineering with required years of experience.
• Experience with ATE test program development and debugging.
• Knowledge of Verilog/VHDL, Python, and C++.

Responsibilities

• Develop test plans for chip IP functions and features.
• Design and implement test circuits using FPGA fabric and embedded IP.
• Develop scripts to automate test generation and own Pre-Si verification.
• Execute Post-Si pattern validation across process, temperature, and voltage.
• Identify root causes of product marginalities and coordinate resolution.
• Own IP content development and drive issues to resolution.
• Plan and deliver test content to meet schedules for samples.
• Extract coverage metrics of test patterns and review improvements.

Skills

RTL Design

Design Verification

Python

C++

Verilog/VHDL

DFT methodologies

Semiconductor testing

Analytical skills

Education

BS in EE/CE/CS

MS in EE/CE/CS

Tools

Nextest Magnum

Advantest T2K

Teradyne UltraFLEX

Pattern Generators

Job description

Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description

Responsibilities

• Develop test plans using established methodologies targeted on chip IP functions and features.
• Design and implement test circuits using FPGA fabric and embedded IP using Lattice’s proprietary design SW.
• Develop scripts to automate test generation and own Pre-Si verification of content to ensure Si readiness.
• Execute Post-Si pattern validation using wafer-level ATE, package-level ATE, and package-level bench platforms across process, temperature, and voltage conditions.
• Identify and analyze to root cause product marginalities, communicating and coordinating root cause closure to appropriate cross-functional team (eg. Applications Engineering, Design Engineering, etc.)
• Take ownership of IP content development and drive any issues to resolution.
• Plan and execute test content delivery to meet or exceed schedules required for internal and external customers samples.
• Extract coverage metrics of test patterns using fault grading and review for coverage improvements.

Required Skills

• BS degree (Electrical, Electronics or Computer Engineering) with 8 years of industry experience, or
• MS degree (Electrical, Electronics or Computer Engineering) with 6 years of industry experience
• Good working knowledge of semiconductor devices and test methodologies
• Experience in ATE test program development, integration and debug on Nextest Magnum, Advantest T2K or Teradyne UltraFLEX preferred.
• Experience in IC characterization and/or failure analysis using various bench tools (i.e. Oscilloscope, Pattern Generators, Data Timing Generator, Multimeters, etc)
• Experience with WAT/etest, wafer sort, package assembly, final test (i.e. full backend IC process)
• Experience in Programmable Logic is desired
• Experience in RTL Design, Design Verification an advantage
• Knowledge in test, DFT methodologies (ie. scan, BIST), memory test, and fault grade methodologies an advantage
• Knowledge in Hardware Description Language such as Verilog or VHDL an advantage
• Knowledge in programming languages (ie. Python, C++)
• Excellent verbal and written skills. Demonstrated ability to work with multiple groups and across cultures
• Good analytical and problem-solving abilities
• Strong Windows, Unix, and MS Office skills
• Curious with strong self-motivation to learn and explore

In addition to base pay, this role may be eligible for variable/ incentive compensation and/ or equity. In addition, this role is eligible for a comprehensive, competitive benefits package which may include healthcare and retirement plans, paid time off, and more!

Additional Information

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

United States of America

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry. Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry.

Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions. Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win. For more information about how our FPGA, CPLD and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace. Applications are welcome from all qualified candidates.

As an E-Verify employer, we use this system to confirm the employment eligibility of all new hires in accordance with federal law. All applicants will be required to complete a Form I-9, Employment Eligibility Verification, upon hire. We do not use E-Verify to pre-screen job candidates and will comply with all E-Verify regulations.