Analog RFIC Design Co-op: Build & Test RFICs

Samtec, Inc; Chandler (AZ); On-site; USD 25,000 - 36,000; Part time

Job summary

Samtec is seeking an Engineering Co-op to work on RFIC design, development, and testing of microwave/RF/mixed-signal blocks. You will design, simulate, and verify circuits using Cadence Virtuoso, collaborating with a team of RFIC engineers in Chandler, AZ.

Applicants must be enrolled in an Electrical Engineering degree program and have an interest in transistor-level analog circuit design. The schedule requires at least 20 hours per week, typically M-F 8AM–6PM, with compensation of $22.00 per

Qualifications

• Presently enrolled in an Electrical Engineering Bachelor’s Degree Program.
• Interest in transistor level, analog circuit design.

Responsibilities

• Design, simulation, and layout of Analog/RF Integrated Circuit blocks, starting from concept and transistor-level feasibility studies.
• Learn to use Cadence Virtuoso design suite for simulation and creating schematics, symbols, and layouts.
• Learn IC design methodology flow.
• Analysis of power consumption, component stress and worst case performance.
• Measure design parameters of fabricated ICs.
• Complete circuit design and participate in design review process.
• Participate in defining bench bring-up and test plans for validation and characterization of designs from prototypes to mass production.
• Technical presentations.
• Engineering support to Production and Applications Engineering teams.
• Familiarity with common lab tools such as soldering iron, voltmeters, oscilloscopes, etc.

Skills

Analog circuit design

RFIC design

Transistor-level design

Education

Bachelor’s degree in Electrical Engineering

Tools

Cadence Virtuoso

Job description

Samtec is seeking an Engineering Co-op to work on RFIC design, development, and testing of microwave/RF/mixed-signal blocks. You will design, simulate, and verify circuits using Cadence Virtuoso, collaborating with a team of RFIC engineers in Chandler, AZ.

Applicants must be enrolled in an Electrical Engineering degree program and have an interest in transistor-level analog circuit design. The schedule requires at least 20 hours per week, typically M-F 8AM–6PM, with compensation of $22.00 per