Analog Hardware Engineer: CIM Compute & PCB Lead

Normal Computing; New York (NY); On-site; USD 180,000 - 240,000; Full time

Job summary

Normal Computing is building silicon that turns thermal noise into a computational resource, redefining AI inference with CIM technology. You will own the end-to-end development of our CIM substrate—from architecture and schematic design to layout, tapeout, and post‑silicon bring‑up.

You will drive analog and PCB design, collaborating with ML engineers to optimize system-level PPA, while delivering robust silicon and boards for next‑gen LLM/diffusion workloads.

Qualifications

• Experience in analog IP development from spec to GDSII, including tape-out and bring-up.
• Experience with memory tech (SRAM/DRAM) at bitcell and array level.
• Experience in schematic and layout of custom bitcells.
• Fluency with Cadence flow: Virtuoso, Spectre, Assembler, Extraction, Layout.
• PCB end-to-end ownership from design to fabrication and bring-up.

Responsibilities

• End-to-end analog development flow: lead the full analog development cycle including research, exploratory design, and evaluation of CIM architectures
• End-to-end PCB design flow: lead the full PCB development cycle including research, design, and evaluation of custom chips
• Silicon bringup: lead post-silicon correlation and validation efforts including root‑cause analysis and general debug
• PCB bringup: ensure the PCB you designed and manufactured is fully functional as intended
• Cross‑functional collaboration: work alongside analog, digital, and ML engineers to further improve system‑level PPA.

Skills

Analog IP design

Memory technologies (SRAM/DRAM)

Custom bitcell design

PCB end-to-end design

Reliability analysis (PVT/Monte Carlo)

Tools

Cadence tools (Virtuoso, Spectre, Assembler, Extraction, Layout)

Job description

Normal Computing is building silicon that turns thermal noise into a computational resource, redefining AI inference with CIM technology. You will own the end-to-end development of our CIM substrate—from architecture and schematic design to layout, tapeout, and post‑silicon bring‑up.

You will drive analog and PCB design, collaborating with ML engineers to optimize system-level PPA, while delivering robust silicon and boards for next‑gen LLM/diffusion workloads.