Analog Design Engineer

Intel Corporation; Chandler (AZ); On-site; USD 122,000 - 173,000; Full time

Benefits offered by this job

Competitive pay

Stock bonuses

Health benefits

Retirement plan

Vacation

Job summary

Intel Corporation in the United States is seeking an Analog Design Engineer to develop cutting-edge analog circuits for advanced process nodes. You will analyze designs with SPICE tools and collaborate with layout, architecture, and validation teams to meet power and performance goals.

The role emphasizes on-site work with close interaction across engineering disciplines, tackling leakage reduction and signal integrity challenges while delivering robust, industry-leading IP for multiple Intel

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3 or more years of experience in circuit design.
• Master's degree in Electrical Engineering, Computer Engineering, or a related field with 2 or more years of experience in circuit design.
• Circuit simulation tools and analog behavior modeling.
• Familiarity with signal and power integrity, and layout understanding for analog circuits.
• Knowledge of TX/RX blocks, I/O fundamentals, and core analog design principles, including noise, linearity, matching, and stability.
• Cadence analog IC design tools.

Responsibilities

• Design, develop, and build analog circuits for analog and mixed-signal IPs in advanced process nodes.
• Perform circuit analysis using SPICE simulation tools (Cadence, Synopsys, LTSpice, etc.).
• Develop and implement test plans to validate designs against circuit and block microarchitecture specifications.
• Support layout activities and work closely with layout engineers to optimize circuit performance.
• Participate in design reviews and contribute to technical documentation.
• Collaborate with cross-functional teams including architecture, logic design, validation, and SOC partners.
• Perform circuit simulations and debug to ensure power integrity, signal integrity, and leakage reduction.
• Conduct rigorous evaluation of simulation results to optimize circuit designs for power and performance.
• Provide regular reports on design progress to key stakeholders, ensuring transparency and alignment across teams.

Skills

Circuit simulation tools

Analog modeling

Signal integrity

Power integrity

I/O fundamentals

Noise and linearity

Stability concepts

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

Cadence analog IC design tools

Job description

Job Details

The Hard IP and Test Chip Development team, within Intel's Central Engineering Group, is responsible for delivering industry defining analog and mixed signal IP for Intel's Client, Datacenter, AI and Foundry customers. The IO team owns high-speed serial IO and die-to-die interfaces across multiple advanced process nodes. As an Analog Design Engineer at Intel, you will play a pivotal role in developing cutting-edge analog circuits for advanced process nodes, contributing directly to the innovation and excellence of our analog and mixed-signal IPs. Your work will shape the performance, power efficiency, and area optimization of design solutions, enabling Intel to deliver industry-leading products. Working collaboratively with cross-functional teams, you will impact the company's success by driving advancements in circuit design and validation and empowering products that redefine technology standards.

Key Responsibilities

• Design, develop, and build analog circuits for analog and mixed-signal IPs in advanced process nodes.
• Perform circuit analysis using SPICE simulation tools (Cadence, Synopsys, LTSpice, etc.).
• Develop and implement test plans to validate designs against circuit and block microarchitecture specifications.
• Support layout activities and work closely with layout engineers to optimize circuit performance.
• Participate in design reviews and contribute to technical documentation.
• Collaborate with cross-functional teams including architecture, logic design, validation, and SOC partners.
• Perform circuit simulations and debug to ensure power integrity, signal integrity, and leakage reduction.
• Conduct rigorous evaluation of simulation results to optimize circuit designs for power and performance.
• Provide regular reports on design progress to key stakeholders, ensuring transparency and alignment across teams.

This is an on-site role and you are expected to work in the office at least 4 days per week.

Candidate Profile

• Strong analytical and problem-solving skills.
• Ability to work independently, analyze and making design trade-offs of analog building blocks at transistor level.
• Strong communication skills and ability to provide critical feedback constructively.

Intel offers a collaborative environment where you can grow your expertise, work with industry-leading professionals, and contribute to innovative solutions that drive technological advancements. Join us and be part of a team that makes a global impact.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 3 or more years of experience in circuit design, or Master's degree in Electrical Engineering, Computer Engineering, or a related field with 2 or more years of experience in circuit design. The years of experience must include:
• Circuit simulation tools and analog behavior modeling.
• Familiarity with signal and power integrity, and layout understanding for analog circuits.
• Knowledge of TX/RX blocks, I/O fundamentals, and core analog design principles, including noise, linearity, matching, and stability.
• Cadence analog IC design tools.

Preferred Qualifications

• IP top level design experience - Floor Planning, Power Delivery, ESD, Bump Map, Top Level Sims, Signal Integrity
• Advanced problem-solving skills with a disciplined approach to execution.
• Experience in group problem-solving and working collaboratively across teams.
• Experience integrating performance, power, and area optimization into circuit designs.
• Experience in analog IC design.
• Mixed-signal design.
• Knowledge of layout considerations for analog circuits.
• Experience with scripting languages (Python, MATLAB, etc.).
• Understanding of statistical analysis and design for manufacturability.

Job Type: College Grad

Shift: Shift 1 (United States of America)

Primary Location: US, Arizona, Phoenix

Additional Locations: US, Oregon, Hillsboro

Equal Opportunity

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation or ordinance.

Benefits

• We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation.
• Annual Salary Range for jobs which could be performed in the US: $122,440.00-172,860.00 USD. The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role: This role will require an on-site presence.

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.