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MediaTek is seeking a new graduate Analog Circuit Design Engineer to design analog and mixed-signal IP blocks for mobile device SoCs in Austin. You will work on FinFET device behavior, low-power techniques, and digital standard cells, maturing concepts from development through production.
The role requires a strong foundation in analog/mixed-signal design, experience with data converters or PMIC design, and proficiency with Cadence Virtuoso, Synopsys tools, and scripting (Python/Perl/Tcl).
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MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, Wi‑Fi 8, and Embedded IoT. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world — enabling everything from smartphones, smart homes, and AI PCs to high-performance computing, automotive, embedded IoT systems, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity.We are seeking a new graduate Analog Circuit Design Engineer to design analog and mixed-signal IP blocks for mobile device SoCs. The ideal candidate has a strong foundation in FinFET device behavior, analog and mixed-signal circuit design, low‑power techniques, and digital standard cells, and is eager to grow from concept development through production.Key ResponsibilitiesDefine mixed-signal design architectures and design analog and/or digital blocks; document specifications and design assumptions.Perform transistor-level feasibility studies and detailed performance analysis; propose and implement design improvements based on simulation results.Model system-level digital control behavior to validate and optimize analog circuit functionality.Drive layout reviews and provide clear guidance to layout engineers to achieve optimal performance, area, and reliability.Perform tape‑out–quality design verification, including EM/IR and timing analysis; work with the ESD and reliability teams to ensure designs meet company quality standards.Develop feasible and robust analog test plans suitable for high-volume mass production.Coordinate with top‑level front‑end and back‑end integration teams to prepare required design models and collateral for seamless SoC integration.