Analog Modeling Engineer

MediaTek Research Lab Inc.; Austin (TX); On-site; USD 128,600 - 217,200; Full time

Benefits offered by this job

Health insurance

401K

Paid holidays

PTO

Parental leave

Job summary

MediaTek Austin is seeking an experienced Analog Behavior Modeling Engineer to join our mixed-signal design team. You will develop behavioral models in SystemVerilog for analog blocks such as LDOs, bandgaps, and temperature sensors, enabling efficient design verification and seamless integration with digital verification environments.

You will verify models against specifications, perform MvS verification, and implement assertions.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 5+ years of experience in analog/mixed-signal verification or behavioral modeling.
• Strong knowledge of SystemVerilog & RNM.
• Understanding of analog circuits like bandgaps, LDOs, oscillators, ADCs/DACs.
• Experience with simulation and debug tools like Synopsys VCS/Verdi.
• Proficiency in scripting languages like Python.
• Excellent communication skills to work across analog design, digital design, and verification teams.

Responsibilities

• Develop behavioral models in SystemVerilog for analog blocks including ring oscillators, reference voltage generators, voltage/frequency meters, LDOs, and temperature sensors.
• Perform unit level verification to verify behavioral model against analog design specification.
• Perform Model vs. Schematic (MvS) verification to ensure model correctness and achieve comprehensive coverage metrics.
• Debug and resolve analog behavioral modeling issues encountered in system-level digital simulations.
• Develop SystemVerilog assertions within models to verify that digital controllers meet analog specification requirements.

Skills

SystemVerilog

RNM (Real Number Modeling)

Analog/mixed-signal verification

Python scripting

VCS/Verdi debugging

Communication skills

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Cadence Virtuoso

Synopsys VCS/Verdi

Job description

MediaTek is a global fabless semiconductor industry leader, providing solutions from the edge to the cloud and powering over 2 billion connected devices every year. Established in 1997, our leading-edge technologies keep the world connected and enhance everyday life. At the forefront of innovation, MediaTek drives advancements in transformative technologies such as AI, 5G/6G, and Wi-Fi 8. Our high-performance, power-efficient solutions form the foundation for a smarter, more connected world, enabling devices from smartphones, smart homes, and AI PCs to high-performance computing, automotive, and AI data centers. As a trusted partner to the world's leading brands, we are committed to ensuring access to world-class technology for everyone. Our dedication to accelerating AI underscores our mission to enrich the future of humanity.ABOUT THE ROLEWe are seeking an experienced Analog Behavior Modeling Engineer to join our mixed-signal design team. In this role, you will develop behavioral models for analog and mixed-signal components, enabling efficient design verification and seamless integration between analog IP and digital verification environments.KEY RESPONSIBILITIESAnalog Behavioral Modeling & Verification:- Implement supply-sensitive and process-aware behavioral models in SystemVerilog for analog blocks including ring oscillators, reference voltage generators, voltage/frequency meters, LDOs, and temperature sensors- Perform unit level verification to verify behavioral model against analog design specification- Perform Model vs. Schematic (MvS) verification to ensure model correctness and achieve comprehensive coverage metrics- Debug and resolve analog behavioral modeling issues encountered in system-level digital simulations- Develop SystemVerilog assertions within models to verify that digital controllers meet analog specification requirements

Main Requirements and Qualifications

• Education:
• - Bachelor's degree in Electrical Engineering, Electronics, or related field
• Required Skills:
• - 5+ years of experience in analog/mixed-signal verification or behavioral modeling
• - Strong knowledge of SystemVerilog & Real Number Modeling (RNM)
• - Understanding of analog circuits like bandgaps, LDOs, oscillators, ADCs/DACs
• - Experience with simulation and debug tools like Synopsys VCS/Verdi
• - Proficiency in scripting languages like Python
• - Excellent communication skills to work across analog design, digital design, and verification teams
• Preferred Experience:
• - Experience with mixed-signal design and verification flows
• - Knowledge of analog design tools such as Cadence virtuoso
• - Understanding of analog-digital integration challenges
• - Knowledge of power and thermal management control circuits
• Salary range: $128,600 - $217,200 annually.
• Employee may be eligible for performance bonus, short and long term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Paid time off (PTO), Parental leave, 401K and more.
• MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.