Always-On Power Management Firmware Engineer

Nutanix

San Diego (CA)

On-site

USD 140,000 - 210,000

Full time

14 days+
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Job summary

Qualcomm Technologies, Inc. is seeking an experienced ASIC Engineer to define, model and design IP for high-performance, low-power products.

You will verify, validate, implement and document IP across block/SoC contexts, collaborating with software and hardware teams to meet system requirements. The role focuses on Always ON Power Management FW development, including limits management and characterization of IPs, in a dynamic cross-functional setting.

Qualifications

  • Bachelor's degree in Science, Engineering, or related field with 4+ years of ASIC design/verification experience.
  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science with 6+ years of relevant experience.
  • PhD in Science, Engineering, or related field with 2+ years of ASIC design/verification experience.
  • Experience with architecture and design tools and scripting languages.

Responsibilities

  • Define, model, design (digital/analog), optimize, verify, validate, implement and document IP/SoC development.
  • Create advanced architectures and circuit specs based on system requirements.
  • Collaborate with software and hardware teams to meet product requirements and schedules.
  • Evaluate process flows from high-level design to place-and-route and power use.

Skills

ASIC design
Verification
Integration
Scripting languages

Education

Bachelor's degree in a related field
Master's degree in Electrical/Electronic Engineering or CS
PhD in related field (optional)

Tools

RTL to GDS Flow
Virtuoso

Job description

Qualcomm Technologies, Inc. is seeking an experienced ASIC Engineer to define, model and design IP for high-performance, low-power products.

You will verify, validate, implement and document IP across block/SoC contexts, collaborating with software and hardware teams to meet system requirements. The role focuses on Always ON Power Management FW development, including limits management and characterization of IPs, in a dynamic cross-functional setting.

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