AI Software Performance Architect

Digitailor; Seattle (WA); On-site; USD 200,000 - 260,000; Full time

Job summary

AMD is seeking a visionary technical leader for the AI Software group to define and drive end-to-end software optimization strategy for top-tier AI workloads. You will bridge architecture, customer engagement, and software engineering to maximize performance across ROCm, compilers, and high-level AI frameworks.

The ideal candidate has a track record solving large-scale performance bottlenecks, deep AI hardware knowledge, and the ability to map architectures to low-level software.

Qualifications

• Experience solving complex performance bottlenecks at scale.
• Deep expertise in AI frameworks (PyTorch, JAX, vLLM, SGLang).
• Proven track record in distributed inference/training across multi-node/multi-GPU.
• Ability to translate technical challenges into strategic roadmaps and engage customers.

Responsibilities

• Set the technical vision and roadmap for workload optimization across the AI software stack.
• Lead profiling, analysis, and tuning of large-scale models to ensure out-of-the-box performance on AMD hardware.
• Engage with top customers and hyperscalers to deliver architectural wins and optimizations.
• Collaborate with hardware, compiler, and framework teams to influence future silicon features.

Skills

AI software optimization

Distributed inference

Performance profiling

Strategic leadership

Cross-functional collaboration

Education

Master’s or Bachelor’s in CS/EE

Tools

TorchProfiler

ROCm Profiler

Nsight

PyTorch

JAX

vLLM

SGLang

Job description

AMD is seeking a visionary technical leader for the AI Software group to define and drive end-to-end software optimization strategy for top-tier AI workloads. You will bridge architecture, customer engagement, and software engineering to maximize performance across ROCm, compilers, and high-level AI frameworks.

The ideal candidate has a track record solving large-scale performance bottlenecks, deep AI hardware knowledge, and the ability to map architectures to low-level software.