AI/ML EDA Layout Engineer Intern

Anite; Calabasas (CA); On-site; USD 56,000 - 74,000; Full time

Benefits offered by this job

Relocation assistance

Job summary

Keysight is seeking an EDA AI/ML Layout Engineering Intern to help automate RFIC and analog layout generation using AI techniques. You will collaborate with EDA engineers and RFIC experts to build intelligent workflows and PCell development pipelines.

The role emphasizes Python development, ML model research, and integration with design tools. Relocation is available for California internship candidates.

Qualifications

• Currently pursuing a Master’s or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, EDA/CAD, Applied Mathematics, or a related technical field.
• Strong programming skills in Python.
• Familiarity with ML frameworks such as PyTorch, TensorFlow, or scikit-learn.
• Solid understanding of data structures, algorithms, and OOP.
• Strong analytical and problem-solving skills.
• Interest in AI/ML applied to engineering design automation.

Responsibilities

• Develop AI and ML solutions for RFIC and analog layout automation
• Research and prototype machine learning techniques for layout synthesis and design optimization
• Assist in the development of PCells and layout generation workflows
• Work on geometric, topological, and rule-aware layout generation techniques
• Contribute to surrogate modeling and design space exploration frameworks
• Build data generation, training, and evaluation pipelines for AI-driven EDA workflows
• Develop software components in Python and potentially C++ under mentorship
• Evaluate AI-assisted design methodologies using real-world semiconductor design problems
• Collaborate with EDA engineers and RFIC designers to validate solutions

Skills

Python

PyTorch

TensorFlow

scikit-learn

Education

Master's or PhD in Electrical Engineering, Computer Engineering, Computer Science, EDA/CAD, Applied Mathematics

Job description

Keysight is seeking an EDA AI/ML Layout Engineering Intern to help automate RFIC and analog layout generation using AI techniques. You will collaborate with EDA engineers and RFIC experts to build intelligent workflows and PCell development pipelines.

The role emphasizes Python development, ML model research, and integration with design tools. Relocation is available for California internship candidates.