AI Hardware Tools Engineer (Compiler & RTL Automation)

OpenAI; San Francisco (CA); On-site; USD 225,000 - 445,000; Full time

Job summary

OpenAI is seeking a Software Tooling Engineer for the Hardware team in San Francisco to build and evolve the tooling ecosystem used by hardware engineers daily, from compilers to automation infrastructure. You will collaborate with architects, RTL designers, and verification engineers to translate real engineering friction into durable tools that accelerate the design of next-generation AI systems.

Expect hands-on work with Verilog/SystemVerilog, compiler passes, and CI processes that ensure

Qualifications

• Demonstrated ability to build and maintain software (projects, internships, research, open source, or equivalent experience).
• Strong CS fundamentals: data structures, algorithms, debugging, and software design.
• Proficiency in at least one of Rust, C++, or Python (and willingness to learn the rest).
• Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware descriptions.
• Familiarity with compiler or IR-based ideas (representations, passes, transformations, lowering), through coursework or projects.
• Comfort operating in ambiguity and iterating quickly with users of your tools.

Responsibilities

• Build and improve the software tooling that makes hardware teams faster: compilation, IR transforms, RTL generation, simulation, debug, and automation.
• Extend and integrate hardware compiler stacks (frontends, IR passes, lowering, scheduling, codegen to Verilog/SystemVerilog) and connect them to real design workflows.
• Improve developer experience and reliability: reproducible builds, better error messages, faster iteration loops, and dependable CI and regression infrastructure.
• Work closely with designers and verification engineers to turn real pain points into durable tools.
• Dive into RTL when needed: read and reason about Verilog/SystemVerilog to debug issues, validate tool output, and improve debuggability.
• Be willing to go all the way down the stack when necessary, including gate-level views, synthesis results, and implementation artifacts.
• Help enable PPA optimization loops by building analysis and automation around area, timing, and power tradeoffs, and by improving tooling that impacts those outcomes.

Skills

Software development

CS fundamentals

Rust/C++/Python

RTL/Verilog/SystemVerilog

Compiler/IR concepts

Ambiguity tolerance

Tools

LLVM

Chisel/FIRRTL

CIRCT/MLIR

Verilator

Yosys/RTLIL

Job description

OpenAI is seeking a Software Tooling Engineer for the Hardware team in San Francisco to build and evolve the tooling ecosystem used by hardware engineers daily, from compilers to automation infrastructure. You will collaborate with architects, RTL designers, and verification engineers to translate real engineering friction into durable tools that accelerate the design of next-generation AI systems.

Expect hands-on work with Verilog/SystemVerilog, compiler passes, and CI processes that ensure