AI/Analog Verification Co-op Engineer

Skyworks; Cedar Rapids (IA); On-site; USD 36,000 - 65,000; Full time

Job summary

Skyworks Cedar Rapids Design Center seeks an engineering student intern to assist in Analog/Mixed Signal verification. You will work with mentors, help set up verification testbenches, and develop software workflows to streamline engineering tasks.

This is an onsite co-op in Cedar Rapids for January through June 2027. You will gain hands-on experience in debugging, writing scripts, and using SystemVerilog/Verilog tools while collaborating with design teams across projects.

Qualifications

• Currently enrolled in an Engineering BS, MS or PhD program.
• Available to work onsite in Cedar Rapids January–June 2027.
• Background in Analog Circuit Design and software programming.
• Strong communication and presentation skills.

Responsibilities

• Set up top level verification testbenches and help design teams pass verification
• Communicate with engineering teams to discover inefficiencies and bottlenecks
• Create new and/or evaluate existing software solutions to develop workflows removing inefficiencies and bottlenecks
• Support existing workflows by adding requested features and fixing bugs
• Create training documentation and train engineers to use new workflows
• Display a positive, can-do attitude
• Must have ability to complete Co-op term prior to graduation

Skills

Analog Circuit Design

Software programming

Python

Linux

Communication skills

VScode

Microsoft Office

Education

Engineering BS/MS/PhD student

Tools

SystemVerilog/Verilog

VerilogAMS

VScode

Microsoft Office

Job description

Skyworks Cedar Rapids Design Center seeks an engineering student intern to assist in Analog/Mixed Signal verification. You will work with mentors, help set up verification testbenches, and develop software workflows to streamline engineering tasks.

This is an onsite co-op in Cedar Rapids for January through June 2027. You will gain hands-on experience in debugging, writing scripts, and using SystemVerilog/Verilog tools while collaborating with design teams across projects.